IP Library Granted Patent US 7,002,197
Granted Patent B2
US 7,002,197 · App. 10/814,094 · Granted Feb 21, 2006

Cross point resistive memory array

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Quick Facts
Patent No.
US 7,002,197
App. No.
10/814,094
Granted
Feb 21, 2006
Kind
B2
Abstract

A cross point resistive memory array has a first array of cells arranged generally in a plane. Each of the memory cells includes a memory storage element and is coupled to a diode. The diode junction extends transversely to the plane of the array of memory cells.

Claims (10)

1. A magnetic memory cell comprising:

a magnetic storage element, the magnetic storage element having a plurality of layers including a first magnetoresistive layer and a second magnetoresistive layer and a non-magnetic material layer therebetween;

a current control element coupled to the magnetic storage element to control current flow therethrough, the current control element including a first region of material of a first conductive type and a second region of material of a second conductive type and defining a junction therebetween, wherein the junction extends transversely to each of the layers in the magnetic storage element; and

wherein the first region of the current control element is in the form of a core and the second region is in the form of a circumferential layer formed on the core, wherein the first and second regions form a pillar structure wherein the pillar structure is disposed within a first conductor line such that the first conductor line surrounds the sides of the pillar structure.

2. The magnetic memory cell as claimed in claim 1 wherein the magnetic storage element is connected to the core at one end of the pillar structure.

3. The magnetic memory cell of claim 1 wherein the current control element comprises a diode.

4. The magnetic memory cell of claim 1 wherein the first region.

5. The magnetic memory cell of claim 1 wherein the first region is in the form of a silicon core and the second region is in the form of a circumferential layer of metal silicide formed on the core, the junction between the first and second regions comprising a pn junction of a Schottky diode.

6. The magnetic memory cell of claim 5 wherein the second region is platinum silicide.

7. The magnetic memory cell of claim 1 wherein the magnetic storage element and the current control element are integrated.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2007
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 019733/0127 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2004
From: PERNER, FREDERICK A.; SHARMA, MANISH
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 015173/0376 →