Method for manufacturing a thin film transistor having high mobility and high on-current

1. A method for manufacturing a thin film transistor, comprising the steps of:

forming an amorphous silicon layer on an insulating substrate;

irradiating said amorphous silicon layer with a laser line beam along a first direction, so that a portion of said amorphous silicon layer irradiate with said laser line beam is converted into a polycrystalline silicon layer;

patterning said polycrystalline silicon layer into a polycrystalline silicon island; and

forming a source region, a channel region and a drain region of said thin film transistor in said polycrystalline silicon island;

wherein said laser line beam irradiating step irradiates said amorphous silicon layer with said laser line beam, so that polycrystalline silicon is grown from portions of said amorphous silicon layer close to edges of said laser line beam to a portion of said amorphous silicon layer close to a center of said laser line beam, said polycrystalline silicon layer being divided into two regions at a line corresponding to the center of said laser line beam;

wherein said polycrystalline silicon island is located within either of the two regions of said polycrystalline silicon layer.

2. A method for manufacturing a thin film transistor, comprising the steps of: forming an amorphous silicon layer on an insulating substrate; irradiating said amorphous silicon layer with a laser line beam along a first direction, so that polycrystalline silicon is grown from portions of said amorphous silicon layer close to edges of said laser line beam to a portion of said amorphous silicon layer close to a center of said laser line beam, thus forming a polycrystalline silicon layer divided into two regions at a line corresponding to the center of said laser line beam; patterning said polycrystalline silicon layer into a polycrystalline silicon island; and forming a source region, a channel region and a drain region of thin film transistor in either of the two regions of said polycrystalline silicon island along a second direction perpendicular to said first direction.

3. The method as set forth in claim 2 , wherein said insulating substrate comprises a glass substrate.

4. A method for manufacturing a P-channel type thin film transistor and an N-channel type thin film transistor, comprising the steps of:

forming an amorohous silicon layer on an insulating substrate;

irradiating said amorphous silicon layer with a plurality of laser line beams alone first direction, so that portions of said amorphous silicon layer irradiated with said laser line beams are converted into a plurality of polycrystalline silicon layers;

patterning each of said polycrystalline silicon layers into a plurality of polycrystalline silicon islands; and forming a source region, a channel region and a drain region of said P-channel type thin film transistor in one of said polycrystalline silicon islands of one of said polycrystalline silicon layers and a source region, a channel region and a drain region of said N-channel thin film transistor in one of said polycrystalline silicon islands of the other of said polycrystalline silicon layers;

wherein said source region, said channel region and said drain region of said P-channel type thin film transistor said source region, said channel region and said drain region of said N-channel thin film transistor are arranged along a second direction perpendicular to said first direction.

5. A method for manufacturing a P-channel type thin film transistor and an N-channel type thin film transistor, comprising the steps of:

forming an amorohous silicon layer on an insulating substrate;

irradiating said amorohous silicon layer with a plurality of laser line beams alone first direction, so that portions of said amorphous silicon layer irradiated with said laser line beams re converted into a plurality of polycrystalline silicon layers;

patterning each of said polycrystalline silicon layers into a plurality of polycrystalline silicon islands; and forming a source region, a channel region and a draft region gf said P-channel type thin film transistor in one of said polycrystalline silicon islands of one of said polycrystalline silicon layers and a source region, a channel region and a drain region of said N-channel thin film transistor in one of said polycrystalline silicon islands of the other of said polycrystalline silicon layers;

wherein said laser line beam irradiating step irradiates said amorphous silicon layer with said laser line beams, so that polycrystalline silicon is grown from portions of said amorphous silicon layer close to edges of each of said laser line beams to portions of said amorphous silicon layers close to centers of each of said laser line beams; each of said polycrystalline silicon layers being divided into two regions at a line corresponding to the centers of said laser line beams.

6. The method as set forth in claim 5 , wherein each of said polycrystalline silicon islands is located within either of the two regions of one of said polycrystalline silicon layers.

7. A method for manufacturing a P-channel thin film transistor and an N-channel thin film transistor, comprising the steps of:

forming an amorphous silicon layer on an insulating substrate;

irradiating said amorphous silicon layer with a plurality of laser line beams along a first direction, so that polycrystalline silicon is grown from portions of said amorphous silicon layer close to edges of each of said laser line beams to portions of said amorphous silicon layer close to a center of each of said laser line beams, thus forming a plurality of polycrystalline silicon layers each divided into two regions at a line corresponding to the center of each of said laser line beams;

patterning either of the two regions of each of said polycrystalline silicon layers into a plurality of polycrystalline silicon islands and forming a source region, a channel region and a drain region of said P-channel type thin film transistor in either of the two regions of one of said polycrystalline silicon islands belonging to one of said polycrystalline silicon layers and a source region, a channel region and a drain region of said N-channel thin film transistor in either of the two regions of one of said polycrystalline silicon islands belonging to the other of said polycrystalline silicon layers along a second direction perpendicular to said first direction.

8. The method as set forth in claim 7 , wherein said insulating substrate comprises a glass substrate.