Method of fabricating a semiconductor device comprising a gate dielectric made of high dielectric permittivity material
View Patent ↗A process and a device for fabricating a semiconductor device having a gate dielectric made of high-k material, includes a step of depositing, directly on the gate dielectric, a first layer of Si 1−x Ge x , where 0.5<x≦1, at a temperature substantially below the temperature at which a poly-Si is deposited by thermal chemical vapor deposition (CVD).
1. A semiconductor device comprising:
a substrate;
a gate dielectric deposited on the substrate, wherein the gate dielectric is made of high dielectric permittivity material; and
a gate formed on top of a Si 1−x Ge x first layer comprising:
a Si 1−x Ge x first layer formed directly on the gate dielectric, where 0.5<x≦1; and,
a Si 1−y Ge y second layer, formed on top of the Si 1−x Ge x first layer where 0≦y≦1.
2. The semiconductor device of claim 1 , wherein at least one of the Si 1−x Ge x first layer and the Si 1−y Ge y second layer is predominantly Ge.
3. The semiconductor device of claim 1 , wherein the gate further comprises a layer for limiting a diffusion of at least one of Ge and Si between the Si 1−y Ge y second layer and the Si 1−x Ge x first layer.
4. The semiconductor device of claim 1 , wherein the gate dielectric is selected in a group of metal oxides consisting of HfO 2 , ZrO 2 , HfSiO and ZrSiO.
5. The semiconductor device of claim 1 , wherein x=1.
6. The semiconductor device of claim 1 , wherein x=y=1.
7. The semiconductor device of claim 1 , wherein an interface between the gate dielectric and the gate is predominantly made of Si.