Granted Patent B2

US 7,414,965 · App. 10/815,723 · Granted Aug 19, 2008

Abstract

Claims (24)

1. A network element comprising:

first and second redundant signal paths carrying first and second redundant signals, respectively;

a first and second selectors for selecting either of the two redundant signals as active;

first and second transition monitors coupled to the first and second signal paths, respectively; and

first and second frame monitors for monitoring said first and second signals, respectively, for the presence of a predefined bit pattern,

wherein said first selector is controlled by the transition monitors and said second selector is controlled by the frame monitors,

wherein said transition monitors monitor said first and second signals for bit level transitions; and in that said first selector is controlled by the transition monitors to alter selection in the event that the selected signal does not contain bit level transitions while the non-selected signal does, and

wherein said signals appear to be valid if said predefined bit pattern is detected and wherein changing selection from the currently selected signal to the other signal according to detection of bit level transition is enabled only, if both signal copies appear to be valid.

2. A network element according to claim 1 , comprising first and second delay elements of substantially N bit depth coupled to said first and second signal paths, respectively, wherein said selector is controlled to alter selection when the selected signal does not contain bit level transitions for a bit sequence of N bits while the non-selected signal does contains bit level transitions in the same interval.

3. A network element according to claim 1 , further comprising a timer, wherein switch-over from one to the other signal according to detection of bit level transition is enabled only if after lapse of said timer the condition persists that the selected signal does not contain bit level transitions.

4. A network element according to claim 1 , further comprising pull-up or pull-down circuits for pulling a failed signal to a predefined level.

5. A selection circuit adapted to be used in a network element comprising first and second redundant signal paths carrying first and second redundant signals, respectively, said circuit comprising:

a first and second selectors for selecting either of the two redundant signals as active;

first and second transition monitors adapted to be coupled to the first and second signal paths, respectively; and

first and second frame monitors for monitoring said first and second signals, respectively, for the presence of a predefined bit pattern,

wherein said first selector is controlled by the transition monitors and said second selector is controlled by the frame monitors,

wherein said transition monitors monitor said first and second signals for bit level transitions; and in that said first selector is controlled by the transition monitors to alter selection in the event that the selected signal does not contain bit level transitions while the non-selected signal does, and

wherein said signals appear to be valid if said predefined bit pattern is detected and wherein changing selection from the currently selected signal to the other signal according to detection of bit level transition is enabled only, if both signal copies appear to be valid.

6. A method of controlling selection of either of first and second signals from first and second redundant signal paths in a network element, said method comprising:

selecting either of the first and second redundant signals as active signal;

monitoring said first and second signals for the presence of a pre-defined bit pattern;

monitoring said first and second signals for bit level transitions;

altering selection in the case that the predetermined bit pattern is detected in the first and second signals and the selected signal does not contain bit level transitions while the non-selected signal does; and

altering selection in the case that the predetermined bit pattern is not detected in the selected signal and the predetermined bit pattern is detected in the non-selected signal.

Assignments (14)