Liquid crystal display, thin film transistor array panel therefor, and manufacturing method thereof

1. A thin film transistor array panel comprising:

a gate line formed on an insulating substrate;

a gate insulating layer on the gate line;

a semiconductor layer on the gate insulating layer;

a data line formed on the gate insulating layer;

a drain electrode formed at least in part on the semiconductor layer;

a color filter formed on the data line and the drain electrode;

a passivation layer formed on the color filter; and

a pixel electrode formed on the color filter and connected to the drain electrode, the pixel electrode comprising a first part formed on a side of the passivation layer, the pixel electrode further comprising a second part contacting the color filter.

2. The thin film transistor array panel of claim 1 , wherein an overlapping portion of the passivation layer and the pixel electrode is disposed on the data line.

3. The thin film transistor array panel of claim 1 , wherein edges of the pixel electrode overlap the passivation layer and the passivation layer has an opening having edges located near the edges of the pixel electrode.

4. The thin film transistor array panel of claim 1 , wherein the data line includes a pair of rectilinear portions connected to each other and making an angle of about 45 degrees with respect to the gate line.

5. The thin film transistor array panel of claim 1 , further comprising a storage electrode line formed on the substrate and including an expansion overlapping the pixel electrode to form a storage capacitor.

6. The thin film transistor array panel of claim 5 , wherein the drain electrode includes an expansion overlapping the expansion of the storage electrode line.

7. The thin film transistor array panel of claim 1 , wherein the passivation layer comprises at least one of organic insulator material and inorganic insulating material.

8. The thin film transistor array panel of claim 1 , wherein the passivation layer comprises photosensitive material.

9. The thin film transistor array panel of claim 1 , further comprising another passivation layer, the another passivation layer disposed between the color filters and the data line.

10. The thin film transistor array panel of claim 1 , wherein the another passivation layer has a contact hole exposing at least a portion of the drain electrode. the color filter has an opening disposed on the drain electrode, and the pixel electrode is connected to the drain electrode through the opening and the contact hole.

11. The thin film transistor array panel of claim 1 , further comprising a contact assistant formed on at least one of a portion of the gate line and a portion of the data line and wherein the contact assistant is made of the same material as the pixel electrode.

12. The thin film transistor array panel of claim 1 , wherein entire bottom surfaces of the data line and the drain electrode are disposed substantially on the semiconductor layer, the data line and the drain electrode have substantially the same planar shape as the semiconductor layer, and the semiconductor layer includes a portion that is not covered with the data line and the drain electrode and disposed between the source electrode and the drain electrode.

13. The thin film transistor array panel of claim 1 , wherein the passivation layer and the pixel electrode covers an entire surface of the color filter.

14. A liquid crystal display comprising:

a first substrate;

a first signal line disposed on the first substrate;

a second line disposed on the first substrate and crossing the first signal line;

a thin film transistor connected to the first and the second signal tines;

a color filter disposed on the first substrate;

an insulating layer disposed on the color filter opposite the first and the second signal lines and the thin film transistor and having an opening exposing the color filter;

a pixel electrode disposed on the color filter and connected to the thin flint transistor, overlapping the insulating layer, and located substantially in the opening of the insulating layer, the pixel electrode including a part contacting the color filter;

a second substrate facing the first substrate and spaced apart from the first substrate with a gap;

a common electrode formed on the second substrate;

a light block member disposed on the common electrode; and

a liquid crystal layer filled in the gap between the first substrate and the second substrate.

15. The liquid crystal display of claim 14 , wherein the insulating layer and the pixel electrode cover an entire surface of the color filter.

16. The liquid crystal display of claim 14 , wherein the light block member includes a first portion maintaining the gap between the first substrate and the second substrate and a second portion having a Thickness tower than the first portion.

17. The liquid crystal display of claim 14 , further comprising a spacer disposed between the first substrate and the second substrate and maintaining the gap between the first substrate and the second substrate.

18. The liquid crystal display of claim 17 , wherein the spacer is located on the thin film transistor.

19. The liquid crystal display of claim 14 , the liquid crystal layer has negative dielectric anisotropy and is configured to vertically align.

20. The liquid crystal display of claim 14 , wherein the common electrode has a cutout.

21. The thin film transistor array panel of claim 1 , wherein the second part is larger than the first part.