IP Library Granted Patent US 7,933,255
Granted Patent B2
US 7,933,255 · App. 10/821,143 · Granted Apr 26, 2011

Multi-antenna wireless data processing system

Assignee: Bellow Bellows LLC
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Quick Facts
Patent No.
US 7,933,255
App. No.
10/821,143
Granted
Apr 26, 2011
Kind
B2
Abstract

A wireless data processing system uses a selectively enabled multi-antenna processor to demodulate N separate data signals from M separate antennas simultaneously. The multi-antenna processor is adapted to respond to changing channel conditions between two access points, so that it selectively kicks in if there is noise, interference, frequency fading, a need for an enhanced data rate, a need for an increased operating range, etc.

Claims (54)

1. A radio frequency (RF) multi-antenna access point enhancement circuit comprising:

a multi-antenna signal processing circuit configured to be situated in a first access point and adapted to:

operate with a first baseband processor, so that the first baseband processor handles data transmissions in a first mode between the first access point and a second access point under a first channel transmission condition, without multi-antenna signal processing by the multi-antenna signal processing circuit, and the multi-antenna signal processor handles data transmissions in a second mode between the first access point and the second access point under a second channel transmission condition;

receive M independent RF modulated input signals from the second access point when the second channel transmission mode exists between the first access point and the second access point; and

process the M independent RF modulated input signals using a channel mixing matrix to extract N independent data signals transmitted by the second access point; wherein the multi-antenna signal processing circuit operates selectively with the first baseband processor to demodulate RF signals received in a channel from the second access point.

2. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is enabled and selectively operates in the second mode when channel conditions indicate that a data rate in said channel has fallen below a predetermined threshold.

3. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is enabled and selectively operates in the second mode in response to a determination that a data rate in the channel is to be enhanced above a nominal operating rate.

4. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is enabled and selectively operates in the second mode in response to a determination that frequency selective fading is present in the channel.

5. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is further adapted to monitor channel transmission conditions.

6. The circuit of claim 1 , wherein the first baseband processor is compatible with an 802.11x communications protocol.

7. The circuit of claim 1 , wherein a processing latency of the multi-antenna signal processing circuit is compensated using a dummy data response to maintain compatibility with a transmission protocol used by the first access point and the second access point.

8. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is configured as a multiple-in, multiple out (MIMO) processor.

9. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is configured to a data stream transmitted using multiple independent antennas which each transmit a portion of the data stream.

10. The circuit of claim 1 , wherein the multi-antenna signal processing circuit is further adapted to operate in parallel with the first baseband processor.

11. The circuit of claim 1 , wherein the first baseband processor is configured to handle data transmissions in the first mode using a single antenna.

12. An 802.11x compatible radio frequency (RF) multi-antenna access point enhancement circuit comprising:

a multi-antenna signal processing circuit configured to be situated in a first access point and adapted to:

operate with a first baseband processor, so that the first baseband processor handles data transmissions in a first mode between the first access point, in accordance with an 802.11x protocol, and a second access point under a first channel transmission condition, without multi-antenna signal processing by the multi-antenna signal processing circuit, and the multi-antenna signal processor handles data transmissions in a second mode between the first access point and the second access point in accordance with an 802.11x protocol under a second channel transmission condition;

receive M independent RF modulated input signals from the second access point when the second channel transmission mode exists between the first access point and the second access point;

process the M independent RF modulated input signals using a channel mixing matrix to extract N independent data signals transmitted by the second access point;

transmit an RF modulated signal to the second access point using a point coordination function (PCF) mode associated with the 802.11x protocol so as to maintain timing compatibility; wherein the multi-antenna signal processing circuit is configured to operate with a first baseband processor to receive and transmit RF signals in a channel between the first access point and the second access point.

13. The circuit of claim 12 , wherein the multi-antenna signal processing circuit is configured to process data using a high rate direct sequence spread spectrum (HR/DSSS) physical layer frame structure that has a preamble and header compatible with the 802.11x protocol.

14. The circuit of claim 13 , wherein the header includes additional data to identify a high rate mode.

15. The circuit of claim 13 , wherein the header includes additional data to identify a modulation format.

16. The circuit of claim 12 , wherein the first baseband processor is configured to send multicast transmissions to a first set of targets within a first range of the first access point, and the multi-antenna signal processing circuit is configured to send multicast transmissions to a second set of targets within a second range of the first access point.

17. The circuit of claim 12 , wherein the first baseband processor is configured to communicate with a first set of targets during a first access period, and the multi-antenna signal processing circuit is configured to communicate with a second set of targets during a second access period.

18. The circuit of claim 17 , wherein the first access period and the second access period are alternated at a predetermined ratio.

19. The circuit of claim 12 , wherein the multi-antenna signal processing circuit uses a wave beam transmission to communicate selectively to a target in a specific location, and not to other targets.

20. The circuit of claim 12 , wherein the multi-antenna signal processing circuit is incorporated as part of a closed circuit television monitoring system, and the M independent signals are transmitted by N individual cameras.

21. The circuit of claim 12 , wherein a receive sensitivity of the first access is adapted to be improved by selectively adding additional multi-antenna signal processing circuit modules for a data transmission and/or increasing M.

22. The circuit of claim 12 , wherein the multi-antenna signal processing circuit is further adapted to operate in parallel with the first baseband processor.

23. The circuit of claim 12 , wherein the first baseband processor is configured to handle data transmissions in the first mode using a single antenna.

24. A radio frequency (RF) multi-antenna access point circuit comprising:

a baseband processor circuit adapted to handle data transmissions during a first operating mode in a channel between a first access point and a second access point;

a multi-antenna signal processing circuit for handling data transmissions during a second operating mode in the channel, the multi-antenna signal processing circuit being further adapted to:

receive M independent RF modulated input signals from the second access point; and

process the M independent RF modulated input signals using a channel mixing matrix to extract N independent data signals transmitted by the second access point; wherein the first operating mode and the second operating mode are automatically selected by the RF multi-antenna access point system based on a transmission condition in the channel;

a modulator/demodulator circuit coupled to an antenna assembly and the multi-antenna signal processing circuit and baseband processor circuit for extracting I/Q data samples from an RF modulated received signal; and

a media access controller coupled to the multi-antenna signal processing circuit and baseband processor circuit for interfacing to a host computing, system, wherein

the baseband processor is adapted to operate with the multi-antenna signal processing circuit, and wherein the baseband processor is configured to handle data transmissions during the first operating mode without multi-antenna signal processing by the multi-antenna signal processing circuit.

25. The circuit of claim 24 , wherein the baseband processor circuit is configured to operate in parallel with the multi-antenna signal processing circuit.

26. The circuit of claim 24 , wherein the baseband processor circuit is configured to handle data transmissions in the first operating mode using a single antenna.

27. A communication system comprising:

a media access controller;

a baseband processor circuit coupled to said media access controller, said baseband processor being configured to handle data transmissions during a first operating mode in a channel between a first access point and a second access point; and

a multi-antenna signal processing circuit configured to handle data transmissions during a second operating mode in said channel, wherein

the baseband processor circuit is configured to operate with the multi-antenna signal processing circuit, and wherein the baseband processor circuit is configured to handle data transmissions during the first operating mode without multi-antenna signal processing by the multi-antenna signal processing circuit.

28. A communication system according to claim 27 , wherein the multi-antenna signal processing circuit is configured to receive M independent modulated input signals from the second access point.

29. A communication system according to claim 27 , wherein the multi-antenna signal processing circuit is configured to process the M independent modulated input signals using a channel mixing matrix to extract N independent data signals transmitted by the second access point.

30. A communication system according to claim 27 , wherein the first operating mode or the second operating mode is selectable by the multi-antenna signal processing circuit.

31. A communication system according to claim 27 , wherein the baseband processing circuit is configured to operate in parallel with the multi-antenna signal processing circuit.

32. A communication system according to claim 27 , wherein the baseband processing circuit is configured to handle data transmissions in the first operating mode using a single antenna.

33. The communication system according to claim 27 , wherein the multi-antenna signal processor is further configured to operate in parallel with the baseband processor circuit.

34. The communication system according to claim 27 , wherein the baseband processor circuit is configured to handle data transmissions in the first operating mode using a single antenna.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2024
From: ZARBAÑA DIGITAL FUND LLC
To: INTELLECTUAL VENTURES I LLC
Reel/Frame 068714/0460 →
MERGER Recorded Dec 9, 2015
From: BELLOW BELLOWS LLC
To: ZARBAÑA DIGITAL FUND LLC
Reel/Frame 037251/0881 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2005
From: EPOGY COMMUNICATIONS, INC.
To: JOHN NICHOLAS GROSS
Reel/Frame 017020/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2005
From: LI, SHAOLIN
To: EPOGY COMMUNICTIONS, INC.
Reel/Frame 017020/0026 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2005
From: GROSS, J. NICHOLAS
To: BELLOW BELLOWS LLC
Reel/Frame 017205/0207 →
Continuity (2)
Provisional Application 60461170 · Apr 7, 2003
Related Publication 20050243954A1 · Nov 3, 2005