Method of manufacturing a capacitor with copper electrodes and diffusion barriers

1. A process for manufacturing a capacitor, wherein said capacitor has a couple of electrodes with a dielectric placed therebetween and at least one of said electrodes is made of copper and said capacitor is formed on a semiconductor substrate, comprising:

forming a nitrided metal film of a shape corresponding to a desired shape of the at least one of said electrodes on said semiconductor substrate or said dielectric; and

forming the at least one of said electrodes on said nitrided metal film by electroplating using said nitrided metal film as a seed.

2. A process for manufacturing a capacitor according to claim 1 , comprising:

forming said nitrided metal film on said semiconductor substrate;

using the at least one of said electrodes as a lower electrode of the capacitor and forming said nitrided metal film as a barrier on said lower electrode;

forming said dielectric on said nitrided metal film; and

forming another electrode, as an upper electrode of the capacitor, on said dielectric.

3. A process for manufacturing a capacitor according to claim 1 , wherein said nitrided metal film is formed on said dielectric, between said dielectric and the at least one of said electrodes, as a barrier to diffusion of copper.

4. A process for manufacturing a capacitor according to claim 1 , wherein said nitrided metal film is TaN.

5. A process for manufacturing a capacitor according to claim 1 , wherein said nitrided metal film is TiN.

6. A method of manufacturing a capacitor comprising:

forming a recess in an insulating layer;

depositing a nitrided metal film to cover surfaces within the recess;

forming a lower capacitor electrode in the recess by electroplating using the nitrided metal film as a seed;

forming a second insulating layer over the lower capacitor electrode and the insulating layer;

forming a second recess within the second insulating layer above the lower capacitor electrode;

forming a dielectric film over the lower capacitor electrode in the second recess; and

forming an upper capacitor electrode within the second recess in the second insulating layer, on the dielectric film.

7. The method of manufacturing a capacitor of claim 6 , wherein said forming an upper capacitor electrode comprises:

depositing a second nitrided metal film to cover surfaces within the second recess; and

performing electroplating using the second nitrided metal film as a seed, to form the upper capacitor electrode within the second recess.

8. The method of manufacturing a capacitor of claim 6 , wherein the lower capacitor electrode is copper.

9. The method of manufacturing a capacitor of claim 6 , wherein the nitrided metal film is TaN.

10. The method of manufacturing a capacitor of claim 6 , wherein the nitrided metal film is TiN.

11. The method of manufacturing a capacitor of claim 6 , wherein the nitrided metal film is a diffusion barrier that prevents diffusion of metal from the lower capacitor electrode into the insulating layer.

12. The method of manufacturing a capacitor of claim 6 , further comprising forming another nitrided metal film between the lower capacitor electrode and the dielectric film.

13. The method of manufacturing a capacitor of claim 7 , wherein the upper capacitor electrode is copper.

14. The method of manufacturing a capacitor of claim 7 , wherein the second nitrided metal film is TaN.

15. The method of manufacturing a capacitor of claim 7 , wherein the second nitrided metal film is TiN.

16. The method of manufacturing a capacitor of claim 7 , wherein the second nitrided metal film is a diffusion barrier that prevents diffusion of metal from the upper capacitor electrode into the second insulating layer.

17. The method of manufacturing a capacitor of claim 6 , wherein said forming a dielectric film comprises extending the dielectric film out of the second recess to cover an upper surface of the second insulating layer.

18. The method of manufacturing a capacitor of claim 17 , wherein an upper surface of the upper capacitor electrode and an upper surface of the dielectric film covering the second insulating layer are coplanar.