IP Library Granted Patent US 7,349,017
Granted Patent B2
US 7,349,017 · App. 10/828,707 · Granted Mar 25, 2008

Color sensor circuit with integrated programmable gain selection

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Quick Facts
Patent No.
US 7,349,017
App. No.
10/828,707
Granted
Mar 25, 2008
Kind
B2
Abstract

A color sensor is implemented on a single integrated circuit chip. The color sensor includes a plurality of color sensor circuits and a gain selection control. Each color sensor circuit in the plurality of color sensor circuits includes a light detector, an amplifier and a gain selection circuit. The amplifier is connected to the light detector. The amplifier amplifies a signal from the light detector. The gain selection circuit is connected to the amplifier. The gain selection controls gain of the amplifier. The gain selection circuit includes a variable feedback resistance. The gain selection control selects a separate value of the variable feedback resistance for each color sensor circuit.

Claims (45)

1. A sensor circuit comprising:

a photodiode for detecting light incident upon the photodiode;

a power supply configured to provide a differential supply voltage; and

an amplifier circuit coupled to the photodiode, the amplifier circuit comprising:

an operational amplifier powered by the differential supply voltage;

a serial chain of resistors; and

a first set of switches operable to couple a feedback circuit to the operational amplifier by configuring the serial chain of resistors in one of

a) a first resistor feedback combination having a resistance value R n that is determined based on the differential supply voltage and a desired detectable level of light, or

b) a second resistor feedback combination having a resistance value R n+1 that is equal to αR n wherein α is a desired accuracy parameter of the color sensor, and wherein the resistance value R n+1 is lower than the resistance value R n .

2. The sensor circuit of claim 1 , wherein the desired accuracy parameter α is defined as a percentage value of the differential supply voltage corresponding to a maximum guaranteed output voltage swing from the amplifier circuit in response to a desired maximum level of light incident upon the photodiode.

3. The sensor circuit of claim 2 , wherein the percentage value is less than 100% of the differential supply voltage whereby the desired accuracy parameter α has a value less than 1.

4. The sensor circuit of claim 1 , wherein the second resistor feedback combination is generated by omitting a resistor from the first resistor feedback combination, the omitting being carried out by operating at least one switch in the first set of switches.

5. The sensor circuit of claim 4 , wherein a detectable level of light M n+1 is higher upon coupling the second resistor feedback combination into the operational amplifier in comparison to coupling the first resistor feedback combination into the operational amplifier.

6. The sensor circuit of claim 5 , wherein the detectable level of light M n+1 is defined by the relationship M n+1 =R n /α.

7. The sensor circuit of claim 1 , wherein the amplifier circuit further comprises:

a first capacitor that is included in the feedback circuit for providing a first frequency compensation to the amplifier circuit;

a second capacitor having a capacitance value that is selected for providing in conjunction with the first capacitor, a second frequency compensation to the amplifier circuit;

a third capacitor having a capacitance value that is selected for providing in conjunction with the first capacitor, a third frequency compensation to the amplifier circuit and for providing in conjunction with the first and second capacitors, a fourth frequency compensation to the amplifier circuit; and

a second set of switches operable to couple at least one of the second or third capacitors in parallel with the first capacitor in the feedback circuit.

8. The sensor circuit of claim 7 , wherein at least one of the first set or the second set of switches is controlled by a combination of digital control bits.

9. The sensor circuit of claim 1 , wherein the differential supply voltage comprises Ground and Vcc.

10. A method of operating the sensor circuit of claim 1 , the method comprising:

providing a graph of detectable levels of light versus output voltage swing from the amplifier circuit for various resistance values;

using the desired detectable level of light and a desired output voltage swing, for identifying a resistance value from the graph; and

operating the first set of switches for configuring the serial chain of resistors to provide a resistor feedback combination having the resistance value identified from the graph.

11. The method of claim 10 , further comprising:

defining a range of detectable levels of light;

selecting a desired resistance value from the graph; and

using the desired resistance value and the defined range of detectable levels of light to identify from the graph, a range of output voltage swing.

12. A sensor circuit comprising:

a photodiode for detecting light incident upon the photodiode;

a power supply configured to provide a differential supply voltage; and

an amplifier circuit coupled to the photodiode, the amplifier circuit comprising:

an operational amplifier powered by the differential supply voltage;

a first series resistor combination having a resistance value R n ; and

a second series resistor combination having a resistance value R n+1 that is lower than the resistance value R n ;

a first set of switches operable to generate the second series resistor combination by decoupling at least one resistor from the first series resistor combination, and further operable to couple the second series resistor combination to the operational amplifier as part of a feedback circuit;

a first capacitor that is included in the feedback circuit for providing a first frequency compensation to the amplifier circuit;

a second capacitor having a capacitance value that is selected for providing in conjunction with the first capacitor, a second frequency compensation to the amplifier circuit;

a third capacitor having a capacitance value that is selected for providing in conjunction with the first capacitor, a third frequency compensation to the amplifier circuit and for providing in conjunction with the first and second capacitors, a fourth frequency compensation to the amplifier circuit; and

a second set of switches operable to couple at least one of the second or third capacitors in parallel with the first capacitor in the feedback circuit.

13. The sensor circuit of claim 12 , wherein a level of light M n+1 detected by the sensor circuit is higher upon coupling the second resistor combination into the operational amplifier in comparison to coupling the first resistor combination into the operational amplifier.

14. The sensor circuit of claim 13 , wherein the detectable level of light M n+1 is defined by the relationship M n+1 =R n /α, wherein α is an accuracy parameter defined as a percentage value of the differential supply voltage corresponding to a maximum guaranteed output voltage swing from the amplifier circuit in response to a desired maximum level of light incident upon the photodiode.

15. The sensor circuit of claim 14 , wherein the percentage value is less than 100% of the differential supply voltage whereby the desired accuracy parameter α has a value less than 1.

16. The sensor circuit of claim 12 , wherein a combination of digital control bits is used for controlling the first set and the second set of switches, thereby providing a selectable plurality of combinations of resistors and capacitors in the feedback circuit.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017206 FRAME: 0666. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038632/0662 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2011
From: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
To: WISTRON CORPORATION
Reel/Frame 027096/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
Reel/Frame 017675/0518 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017206/0666 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2004
From: TAN, BOON KEAT; HO, CHI MUN
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 015137/0797 →