IP Library Granted Patent US 7,009,239
Granted Patent B2
US 7,009,239 · App. 10/834,110 · Granted Mar 7, 2006

Vertical semiconductor device and manufacturing method thereof

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Quick Facts
Patent No.
US 7,009,239
App. No.
10/834,110
Granted
Mar 7, 2006
Kind
B2
Abstract

A semiconductor device includes an n-type semiconductor substrate ( 1 ) including a p-type collector layer ( 2 ) formed in a second main surface side thereof, a trench ( 13 ) is formed in a peripheral portion of the semiconductor substrate ( 1 ) so as to surround the inside and reach the collector layer ( 2 ) from a first main surface of the semiconductor substrate ( 1 ), and a p-type isolation region ( 14 ) formed by diffusion from a sidewall of the trench ( 13 ) is provided to be connected to the collector layer ( 2 ). The trench ( 13 ) is filled with a filling material ( 16 ).

Claims (24)

1. A vertical semiconductor device comprising:

a semiconductor substrate of a first conductivity type including a first main surface and a second main surface opposed to said first main surface, said semiconductor substrate including an element region and a peripheral provided so as to surround said element region;

a first impurity region of a second conductivity type having a higher impurity concentration than said first conductivity type of said semiconductor substrate, formed inside said semiconductor substrate so as to be exposed at said second main surface;

a trench provided in said peripheral region and having an almost vertical sidewall with reference to said first main surface; and

a second impurity region of said second conductivity type formed along said sidewall of said trench inside of said semiconductor substrate in a prescribed thickness and electrically connected to said first impurity region, wherein

a ratio d/w (aspect ratio) between a depth d and an opening width w of said trench is 5 or more and 100 or less.

2. The vertical semiconductor device according to claim 1 , further comprising a filling material filled in said trench.

3. The vertical semiconductor device according to claim 1 , wherein

said trench is formed continuously so as to surround said element region and includes a first sidewall close to said element region and a second sidewall far from said element region, and

said second impurity region includes second impurity regions on said first sidewall side and said second sidewall side which are formed in a prescribed thickness from said first and second sidewalls to the inside of said semiconductor substrate, respectively,

said vertical semiconductor device further comprising:

a field plate in electrical contact with said second impurity region on said second sidewall side.

4. A vertical semiconductor device comprising:

a semiconductor substrate of a first conductivity type including a first main surface and a second main surface opposed to said first main surface, said semiconductor substrate including an element region and a peripheral region provided so as to surround said element region;

a first impurity region of a second conductivity type having a higher impurity concentration than said first conductivity type of said semiconductor substrate, formed inside said semiconductor substrate so as to be exposed at said second main surface;

a trench provided in said peripheral region to reach said first impurity region from said first main surface and having an almost vertical sidewall with reference to said first main surface; and

a filling material filled in said trench and being made of a semiconductor material of said second conductivity type.

5. A vertical semiconductor device comprising:

a semiconductor substrate of a first conductivity type including a first main surface and a second main surface opposed to said first main surface, said semiconductor substrate including an element region and a peripheral region provided so as to surround said element region;

a first impurity region of a second conductivity type having a higher impurity concentration than said first conductivity type of said semiconductor substrate, formed inside said semiconductor substrate so as to be exposed at said second main surface;

a plurality of trenches provided in said peripheral region so as to surround said element region with a prescribed distance therebetween; and

a plurality of second impurity regions of said second conductivity type formed along sidewalls of said plurality of said trenches inside of said semiconductor substrate in a prescribed thickness and electrically connected to said first impurity region, respectively.

6. The vertical semiconductor device according to claim 5 , wherein

a distance between said plurality of said second impurity regions is 15 μm or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2020
From: MITSUBISHI ELECTRIC CORPORATION
To: ARIGNA TECHNOLOGY LIMITED
Reel/Frame 052042/0651 →