Data transfer control device, electronic instrument, and data transfer control method

1. A data transfer control device for data transfer, the data transfer control device comprising:

a hub dedicated data storage section which stores a packet transferred between the data transfer control device and a hub;

a packet transmission section which cyclically issues a token packet to the hub for asking whether the state of the hub has changed or not;

a packet reception section which receives a response packet sent from the hub in response to the token packet;

a transfer controller which writes the response packet received by the packet reception section into the hub dedicated data storage section, and generates an interrupt which indicates that the state of the hub has changed;

a packet buffer in which a plurality of pipe regions are allocated, each of the plurality of pipe regions storing a packet transferred between one of the plurality of pipe regions and a corresponding endpoint; and

a transfer mode setting register in which is set data for setting a hub dedicated transfer mode or a normal transfer mode,

wherein a storage region of the hub dedicated data storage section is allocated for the transfer between the data transfer control device and the hub which is the endpoint when the hub dedicated transfer mode is set in the transfer mode setting register; and

wherein a storage region of the packet buffer is allocated for the transfer between the data transfer control device and the hub which is the endpoint when the normal transfer mode is set in the transfer mode setting register.

2. The data transfer control device as defined in claim 1 ,

wherein the transfer controller writes the response packet into the hub dedicated data storage section and generates the interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a negative acknowledgement (NAK) packet which indicates that there is no data to send.

3. The data transfer control device as defined in claim 2 ,

wherein the storage region of the hub dedicated data storage section is provided in a region differing from the storage region of the packet buffer.

4. The data transfer control device as defined in claim 3 , further comprising:

a transfer condition register having an instruction bit for instructing start of data transfer in which the hub dedicated data storage section is used,

wherein the packet transmission section issues the token packet when the instruction bit is active.

5. The data transfer control device as defined in claim 4 ,

wherein the packet transmission section cyclically issues the token packet from when the instruction bit becomes active until the instruction bit becomes inactive.

6. The data transfer control device as defined in claim 2 , further comprising:

a transfer condition register having an instruction bit for instructing start of data transfer in which the hub dedicated data storage section is used,

wherein the packet transmission section issues the token packet when the instruction bit is active.

7. The data transfer control device as defined in claim 6 ,

wherein the packet transmission section cyclically issues the token packet from when the instruction bit becomes active until the instruction bit becomes inactive.

8. The data transfer control device as defined in claim 2 , further comprising:

a state controller which controls host operation performed by the data transfer control device when the data transfer control device is a host, or peripheral operation performed by the data transfer control device when the data transfer control device is a peripheral, by switching a plurality of states including a state for controlling the host operation and a state for controlling the peripheral operation;

the transfer controller including a host controller which transfers data in the host operation, and a peripheral controller which transfers data in the peripheral operation;

the plurality of pipe regions being allocated in the packet buffer in the host operation, and the host controller transferring a packet between one of the plurality of pipe regions and a corresponding endpoint; and

a plurality of endpoint regions being allocated in the packet buffer in the peripheral operation, and the peripheral controller transferring a packet between one of the plurality of endpoint regions and the host;

wherein in the host operation, the transfer controller writes the response packet into the hub dedicated data storage section and generates the interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a negative acknowledgement (NAK) packet which indicates that there is no data to send.

9. An electronic instrument comprising:

the data transfer control device as defined in claim 2 ; and

a processor which controls the data transfer control device.

10. The data transfer control device as defined in claim 1 ,

wherein the storage region of the hub dedicated data storage section is provided in a region differing from the storage region of the packet buffer.

11. The data transfer control device as defined in claim 10 , further comprising:

a transfer condition register having an instruction bit for instructing start of data transfer in which the hub dedicated data storage section is used,

wherein the packet transmission section issues the token packet when the instruction bit is active.

12. The data transfer control device as defined in claim 11 ,

wherein the packet transmission section cyclically issues the token packet from when the instruction bit becomes active until the instruction bit becomes inactive.

13. The data transfer control device as defined in claim 10 , further comprising:

a state controller which controls host operation performed by the data transfer control device when the data transfer control device is a host, or peripheral operation performed by the data transfer control device when the data transfer control device is a peripheral, by switching a plurality of states including a state for controlling the host operation and a state for controlling the peripheral operation;

the transfer controller including a host controller which transfers data in the host operation, and a peripheral controller which transfers data in the peripheral operation;

the plurality of pipe regions being allocated in the packet buffer in the host operation, and the host controller transferring a packet between one of the plurality of pipe regions and a corresponding endpoint; and

a plurality of endpoint regions being allocated in the packet buffer in the peripheral operation, and the peripheral controller transferring a packet between one of the plurality of endpoint regions and the host;

wherein in the host operation, the transfer controller writes the response packet into the hub dedicated data storage section and generates the interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a negative acknowledgement (NAK) packet which indicates that there is no data to send.

14. An electronic instrument comprising:

the data transfer control device as defined in claim 10 ; and

a processor which controls the data transfer control device.

15. The data transfer control device as defined in claim 1 , further comprising:

a transfer condition register having an instruction bit for instructing start of data transfer in which the hub dedicated data storage section is used,

wherein the packet transmission section issues the token packet when the instruction bit is active.

16. The data transfer control device as defined in claim 15 , wherein the packet transmission section cyclically issues the token packet from when the instruction bit becomes active until the instruction bit becomes inactive.

17. The data transfer control device as defined in claim 16 , further comprising:

a state controller which controls host operation performed by the data transfer control device when the data transfer control device is a host, or peripheral operation performed by the data transfer control device when the data transfer control device is a peripheral, by switching a plurality of states including a state for controlling the host operation and a state for controlling the peripheral operation;

the transfer controller including a host controller which transfers data in the host operation, and a peripheral controller which transfers data in the peripheral operation;

the plurality of pipe regions being allocated in the packet buffer in the host operation, and the host controller transferring a packet between one of the plurality of pipe regions and a corresponding endpoint; and

a plurality of endpoint regions being allocated in the packet buffet in the peripheral operation, and the peripheral controller transferring a packet between one of the plurality of endpoint regions and the host;

wherein in the host operation, the transfer controller writes the response packe into the hub dedicated data storage section and generates the interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a negative acknowledgement (NAK) packet which indicates that there is no data to send.

18. An electronic instrument comprising:

the data transfer control device as defined in claim 16 ; and

a processor which controls the data transfer control device.

19. The data transfer control device as defined in claim 15 , further comprising:

a state controller which controls host operation performed by the data transfer control device when the data transfer control device is a host, or peripheral operation performed by the data transfer control device when the data transfer control device is a peripheral, by switching a plurality of states including a state for controlling the host operation and a state for controlling the peripheral operation;

the transfer controller including a host controller which transfers data in the host operation, and a peripheral controller which transfers data in the peripheral operation;

the plurality of pipe regions being allocated in the packet buffer in the host operation, and the host controller transferring a packet between one of the plurality of pipe regions and a corresponding endpoint; and

a plurality of endpoint regions being allocated in the packet buffer in the peripheral operation, and the peripheral controller transfers a packet between one of the plurality of endpoint regions and the host;

wherein in the host operation, the transfer controller writes the response packet into the hub dedicated data storage section and generates the interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a negative acknowledgement (NAK) packet which indicates that there is no data to send.

20. An electronic instrument comprising:

the data transfer control device as defined in claim 15 ; and

a processor which controls the data transfer control device.

21. The data transfer control device as defined in claim 1 , performing data transfer in conformity to the Universal Serial Bus (USB) standard.

22. The data transfer control device as defined in claim 1 , further comprising:

a state controller which controls host operation performed by the data transfer control device when the data transfer control device is a host, or peripheral operation performed by the data transfer control device when the data transfer control device is a peripheral, by switching a plurality of states including a state for controlling the host operation and a state for controlling the peripheral operation;

the transfer controller including a host controller which transfers data in the host operation, and a peripheral controller which transfers data in the peripheral operation; and

the plurality of pipe regions being allocated in the packet buffer in the host operation, and the host controller transferring a packet between one of the plurality of pipe regions and a corresponding endpoint; and

a plurality of endpoint regions being allocated in the packet buffer in the peripheral operation, and the peripheral controller transferring a packet between one of the plurality of endpoint regions and the host;

wherein in the host operation, the transfer controller writes the response packet into the hub dedicated data storage section and generates the interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a negative acknowledgement (NAK) packet which indicates that there is no data to send.

23. The data transfer control device as defined in claim 22 , performing data transfer in conformity to the Universal Serial Bus (USB) On-The-Go (OTG) standard.

24. An electronic instrument comprising:

the data transfer control device as defined in claim 1 ; and

a processor which controls the data transfer control device.

25. A data transfer control method for data transfer, the method comprising:

storing a packet transferred between the data transfer control device and a hub;

cyclically issuing a token packet to the hub for asking whether the state of the hub has changed or not;

receiving a response packet from the hub in response to the token packet;

writing the response packet into a hub dedicated data storage section and generating an interrupt which indicates that the state of the hub has changed, on condition that the response packet is not a first packet which indicates that there is no data to send;

allocating a plurality of pipe regions in a packet buffer, each of the plurality of pipe regions storing a packet transferred between one of the plurality of pipe regions and a corresponding endpoint; and

setting data for setting a hub dedicated transfer mode or a normal transfer mode in a transfer mode setting register,

wherein a storage region of the hub dedicated data storage section is allocated for the transfer between the data transfer control device and the hub which is the endpoint when the hub dedicated transfer mode is set in the transfer mode setting register; and

wherein a storage region of the packet buffer is allocated for the transfer between the data transfer control device and the hub which is the endpoint when the normal transfer mode is set in the transfer mode setting register.

26. The data transfer control method as defined in claim 25 ,

wherein the response packet is written into the hub dedicated data storage section and the interrupt which indicates that the state of the hub has changed is generated, on condition that the response packet is not the NAK packet which indicates that there is no data to send.