Active inductance circuit and differential amplifier circuit
View Patent ↗An active inductance circuit comprising a signal terminal (OUT) and having voltage and current characteristics, as viewed from this terminal, which are identical to those of a circuit comprising an inductance, this active inductance circuit having a structure in which the drain terminal of a first MOS transistor M 1 and the gate terminal of a second MOS transistor M 2 different in conductivity type from the first MOS transistor are connected to the signal terminal, the gate terminal of the first MOS transistor is connected to the source terminal of the second MOS transistor, a capacitor and a current source are connected to the source terminal of the second transistor, the source terminal of the first MOS transistor and the drain terminal of the second MOS transistor are connected to a power source and other terminals of the capacitor and current source are connected to another power source.
1. An active inductance circuit in which voltage and current characteristics at an output terminal represent characteristics of the circuit including inductance, comprising:
a first transistor comprising a control terminal, a first signal terminal, and a second signal terminal;
a second transistor different in conductivity type from the first transistor, comprising a control terminal, a first signal terminal, and a second signal terminal;
a capacitor; and
a current source,
wherein the first signal terminal of the first transistor is connected to the output terminal;
the control terminal of the second transistor is connected to the first signal terminal of the first transistor;
the control terminal of the first transistor is connected to the second signal terminal of the second transistor; and
the second signal terminal of the second transistor is connected to a terminal of the current source and a terminal of the capacitor.
2. An active inductance circuit according to claim 1 , wherein the first and second transistors are MOS transistors, the control terminal is a gate terminal, the first terminal is a drain terminal, and the second terminal is a source terminal.
3. An active inductance circuit according to claim 1 , wherein the first transistor is a PMOS transistor and the second transistor is an NMOS transistor.
4. An active inductance circuit according to claim 2 , wherein the first transistor is a PMOS transistor and the second transistor is an NMOS transistor.
5. An active inductance circuit according to claim 1 , wherein the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.
6. An active inductance circuit according to claim 1 , wherein
the second signal terminal of the first transistor and the first signal terminal of the second transistor are connected to a first power source, and
another terminal of the current source and another terminal of the capacitor are connected to a second power source.
7. An active inductance circuit according to claim 1 , further comprising a second capacitor connected in parallel with the first transistor.
8. An active inductance circuit according to claim 1 , wherein the capacitor is a variable capacitor controlled with a control signal.
9. An active inductance circuit according to claim 1 , wherein an electric current value of the current source is controlled with a control signal.
10. A differential amplifier circuit comprising:
a first active inductance circuit;
a second active inductance circuit; and
a differential pair comprising a first transistor and a second transistor; wherein control terminals of the first and second transistors are input terminals for differential signals,
output terminals of the first and second active inductance circuits are connected to first signal terminals of the first and second transistors respectively;
the first signal terminals of the first and second transistors are differential signal output terminals,
second signal terminals of the first and second transistors are connected to a current source,
each of the first and second active inductance circuits comprises a third transistor comprising a control terminal, a first signal terminal, and a second signal terminal; a fourth transistor different in conductivity type from the third transistor, comprising a control terminal, a first signal terminal, and a second signal terminal; a capacitor; and a second current source,
the first signal terminal of the third transistor is connected to an output terminal,
the control terminal of the fourth transistor is connected to the first signal terminal of the third transistor,
the control terminal of the third transistor is connected to the second signal terminal of the fourth transistor, and
the second signal terminal of the fourth transistor is connected to a terminal of the second current source and a terminal of the capacitor.
11. A differential amplifier circuit according to claim 10 , wherein the first, second, third, and fourth transistors are MOS transistors, the control terminal is a gate terminal, the first terminal is a drain terminal, and the second terminal is a source terminal.
12. A differential amplifier circuit according to claim 11 , wherein
the current source comprises a third current source connected to the source terminal of the first transistor and a fourth current source connected to the source terminal of the second transistor, and
an impedance element is connected between the source terminals of the first and second transistors.
13. A differential amplifier circuit according to claim 12 , wherein the impedance element is constituted by a capacitor.
14. A differential amplifier circuit according to claim 12 , wherein each of the first and second active inductance circuits comprises a third capacitor connected in parallel with the third transistor.