IP Library Granted Patent US 7,196,421
Granted Patent B2
US 7,196,421 · App. 10/839,770 · Granted Mar 27, 2007

Integrated circuit having at least one metallization level

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Quick Facts
Patent No.
US 7,196,421
App. No.
10/839,770
Granted
Mar 27, 2007
Kind
B2
Abstract

An integrated circuit is provided that includes at least one metallization level having a plurality of dummy conductors. At least one of the dummy conductors has an oriented shape made up of a plurality of non-parallel rectangles in mutual contact. In one embodiment, the at least one dummy conductor is in the form of an “L”. In another embodiment, the at least one dummy conductor is in the form of a Latin cross. In yet another embodiment, the at least one dummy conductor is in the form of a “T”.

Claims (20)

1. An integrated circuit comprising:

at least one metallization level that includes a plurality of dummy conductors,

wherein at least one of the dummy conductors has an oriented shape made up of a plurality of non-parallel rectangles in mutual contact, the at least one dummy conductor being in the form of an “L” or in the form of a “T”, and

the degree of metallization of the surface of the one metallization layer that includes the dummy conductors is from about 10 to 20%.

2. The integrated circuit according to claim 1 , wherein the at least one dummy conductor consists of two perpendicular rectangles.

3. The integrated circuit according to claim 2 , wherein the at least one dummy conductor is in the form of an “L”.

4. The integrated circuit according to claim 2 ,

wherein each of the plurality of dummy conductors consists of two perpendicular rectangles in the form of an “L”, and

the plurality of dummy conductors are aligned and oriented in an identical manner.

5. The integrated circuit according to claim 2 , wherein at least one of the dummy conductors is in the form of a Latin cross.

6. The integrated circuit according to claim 2 , wherein the at least one dummy conductor is in the form of a “T”.

7. The integrated circuit according to claim 2 ; wherein each of the rectangles has a width of less than about 2 μm.

8. The integrated circuit according to claim 7 , wherein each of the rectangles has a length of from about 2 to 10 μm.

9. The integrated circuit according to claim 7 , wherein each of the rectangles has a length of from about 4 and 6 μm.

10. The integrated circuit according to claim 2 , wherein each of the rectangles has a length of from about 2 to 10 μm.

11. The integrated circuit according to claim 1 , wherein the dummy conductors comprise aluminum.

12. The integrated circuit according to claim 1 , wherein the dummy conductors include an upper layer based on aluminum or copper.

13. The integrated circuit according to claim 1 , wherein the degree of metallization of the surface of the one metallization layer that includes the dummy conductors is between 10 and 20%.

14. The integrated circuit according to claim 1 , wherein the one metallization layer is an interconnect level.

15. The integrated circuit according to claim 1 , wherein the one metallization layer is a gate level.

Assignments (2)
CHANGE OF NAME Recorded Jan 20, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066357/0182 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2004
From: VALLET, MICHEL
To: STMICROELECTRONICS SA
Reel/Frame 015132/0356 →