IP Library Granted Patent US 6,933,872
Granted Patent B2
US 6,933,872 · App. 10/844,022 · Granted Aug 23, 2005

Digital/analog converter circuit with a device for compensating nonlinear distortions

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Quick Facts
Patent No.
US 6,933,872
App. No.
10/844,022
Granted
Aug 23, 2005
Kind
B2
Abstract

A digital/analog converter circuit ( 1 ) comprises a precompensation stage ( 10 ), a PCM/PWM converter stage ( 7 ) and a digital/analog converter stage ( 8 ), these components being arranged in the signal path in the stated order. The transfer function of the precompensation stage ( 10 ) is designed such that the analog output signal ( 19 ) is essentially proportional to the digital PCM input signal ( 11 ).

Claims (38)

1. A digital/analog converter circuit for converting a digital PCM input signal into an analog output signal, in which the signal path comprises the following in the stated order:

a precompensation stage for the digital PCM input signal operating, at least to some extent, at a higher signal rate than the signal rate of the digital PCM input signal,

a PCM/PWM converter stage, and

digital/analog converter stage,

wherein a transfer function of the precompensation stage is designed such that the analog output signal is essentially proportional to the digital PCM input signal, and the precompensation stage comprises the following components, which are arranged in the signal path in the stated order:

a further PCM/PWM converter stage,

an oversampling stage, and

a digital filter.

2. The digital/analog converter circuit as claimed in claim 1 , wherein the precompensation stage comprises a decimation stage which is arranged in the signal path downstream of the digital filter.

3. The digital/analog converter circuit as claimed in claim 2 , wherein the transfer function of the digital filter can be set such or has been set such that the analog output signal is essentially proportional to the digital PCM input signal.

4. The digital/analog converter circuit as claimed in claim 2 , wherein the transfer function of the digital filter is designed as a low pass filter function.

5. The digital/analog converter circuit as claimed in claim 2 , wherein the digital filter is a recursive wave digital filter or an FIR filter.

6. The digital/analog converter circuit as claimed in claim 1 , wherein the precompensation stage has a noise shaper connected to the digital/analog converter circuit.

7. The digital/analog converter circuit as claimed in claim 1 , wherein the digital/analog converter stage has an analog filter connected downstream of the digital/analog converter circuit.

8. The digital/analog converter circuit as claimed in claim 1 , wherein the digital/analog converter stage is a circuit breaker.

9. The digital/analog converter circuit as claimed in claim 1 , wherein the digital/analog converter circuit is contained in an audio amplifier, particularly in an audio class D amplifier.

10. A method for converting a digital PCM input signal into an analog output signal, said method comprising:

precompensating the digital PCM input signal;

converting the digital, precompensated PCM signal into a digital PWM signal; and

converting the digital PWM signal into the analog output signal;

wherein precompensating the digital PCM input signal is performed, at least to some extent, at a higher signal rate than the signal rate of the digital PCM input signal, and precompensating the digital PCM input signal causes the analog output signal to be essentially proportional to the digital PCM input signal, and the precompensation for the digital PCM input signal involves carrying out the steps of:

converting the digital PCM input signal into a digital PWM intermediate signal;

generating a digital PCM intermediate signal by oversampling the digital PWM intermediate signal; and

filtering the digital PCM intermediate signal using a digital filter.

11. The method as claimed in claim 10 , wherein the transfer function of the digital filter is set such or has been set such that the analog output signal is essentially proportional to the digital PCM input signal.

12. The method as claimed in claim 10 , wherein the transfer function of the digital filter is designed as a low pass filter function.

13. The method as claimed in claim 10 , wherein the digital PCM input signal prior to precompensation and/or, if appropriate, the digital PCM signal which is output by the decimation stage is processed by a noise shaper.

14. The method as claimed in claim 10 , wherein the analog output signal is filtered.

15. The method as claimed in claim 10 , wherein the digital filter is a recursive wave digital filter or an FIR filter.

16. The method as claimed in claim 10 , wherein the digital PWM signal is converted into the analog output signal using a circuit breaker.

17. The method as claimed in claim 10 , wherein the method is used in an audio class D amplifier.

18. A method for converting a digital PCM input signal into an analog output signal, said method comprising:

precompensating the digital PCM input signal;

converting the digital precompensated PCM signal into a digital PWM signal; and

converting the digital PWM signal into the analog output signal, precompensating the digital PCM input signal causing the analog output signal to be essentially proportional to the digital PCM input signal, the precompensation for the digital PCM input signal involving the steps:

converting the digital PCM input signal into a digital PWM intermediate signal;

generating a digital PCM intermediate signal by oversampling the digital PWM intermediate signal; and

filtering the digital PCM intermediate signal using a digital filter, wherein the method is used in an audio class D amplifier.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053518/0765 →
CONFIRMATORY ASSIGNMENT EFFECTIVE AS OF JANUARY 1, 2018 Recorded Aug 12, 2020
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 053477/0121 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →