IP Library Granted Patent US 7,346,318
Granted Patent B2
US 7,346,318 · App. 10/844,423 · Granted Mar 18, 2008

High frequency power amplifier component and radio communication system

Assignees: Renesas Technology Corp.; Hitachi Hybrid Network Co., Ltd.
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Quick Facts
Patent No.
US 7,346,318
App. No.
10/844,423
Granted
Mar 18, 2008
Kind
B2
Abstract

In radio communication system that is able to transmit in two or more modulation modes, e.g., one modulation mode when phase shifts are performed and another modulation mode when phase shifts and amplitude shifts are performed, the disclosed invention can avoid that receiving band noise becomes so great not to conform to the GSM standards' prescription for such noise in a high voltage region of the power supply voltage, even when the output power is controlled by changing the amplitude of the input signal to the power amplifier circuitry while fixing the bias voltages to be applied to the power amplifying transistors. When the output power is controlled as above, in the modulation mode (GSM mode) when phase shifts are performed, idle currents flowing across the power amplifying transistors are regulated, depending on the power supply voltage, i.e., the idle currents are decreased when the power supply voltage is high and increased when the power supply voltage is low.

Claims (11)

1. A radio communication system, comprising a high-frequency power amplifier component comprising a high-frequency power amplification circuit which comprises power amplifying transistors and is capable of operating in a first operation mode in which said power amplifying transistors amplify and output phase modulated high-frequency signals and in a second operation mode in which said power amplifying transistors amplify and output phase modulated and amplitude modulated high-frequency signals and a bias circuit which applies bias to said power amplifying transistors, said bias causing a changeover between idle currents flowing across said power amplifying transistors in said first operation mode and idle currents flowing across said power amplifying transistors in said second operation mode, wherein said bias circuit is configured to change the idle currents flowing across said power amplifying transistors, depending on the level of power supply voltage and the level of required output power, in said first operation mode, a second electronic component including a transmission/reception change-over circuit which changes over system operation between transmitting signals and receiving signals, and a third electronic component which modulates transmit signals and inputs modulated transmit signals to said high-frequency power amplifier component,

wherein said third electronic component includes a gain control amplifier circuit which is able to control the amplitude of the transmit signals to be supplied to said high-frequency power amplifier component and supplies the signals with amplitude adjusted in accordance with the level of required output power through control of the gain of said gain control amplifier, depending on the level of required output power, to said high-frequency power amplifier component, when in either of said first operation mode and said second operation mode,

wherein said third electronic component is configured to supply a signal to indicate which of said first operation mode and said second operation mode to said high-frequency power amplifier component, and

wherein said third electronic component includes a storage means for storing table data to determine said control current, depending on the level of required output power, at least in said first operation mode.

2. A radio communication system,

comprising the high-frequency power amplifier component comprising a high-frequency power amplification circuit which comprises power amplifying transistors and is capable of operating in a first operation mode in which said power amplifying transistors amplify and output phase modulated high-frequency signals and in a second operation mode in which said power amplifying transistors amplify and output phase modulated and amplitude modulated high-frequency signals and a bias circuit which applies bias to said power amplifying transistors, said bias causing a changeover between idle currents flowing across said power amplifying transistors in said first operation mode and idle currents flowing across said power amplifying transistors in said second operation mode,

wherein said bias circuit is configured to change the idle currents flowing across said power amplifying transistors, depending on the level of power supply voltage and the level of required output power, in said first operation mode, a second electronic component including a transmission/reception change-over circuit which changes over system operation between transmitting signals and receiving signals, and a third electronic component which modulates transmit signals and inputs modulated transmit signals to said high-frequency power amplifier component,

wherein said third electronic component includes a gain control amplifier circuit which is able to control the amplitude of the transmit signals to be supplied to said high-frequency power amplifier component and supplies the signals with amplitude adjusted in accordance with the level of required output power through control of the gain of said gain control amplifier, depending on the level of required output power, to said high-frequency power amplifier component, when in either of said first operation mode and said second operation mode,

wherein said third electronic component is configured to supply a signal to indicate which of said first operation mode and said second operation mode to said high-frequency power amplifier component,

wherein said third electronic component includes a storage means for storing table data to determine said control current, depending on the level of required output power, at least in said first operation mode, and

wherein the radio communication system further comprises an output power detector circuit which detects the output power of signals output from said high-frequency power amplifier circuit and a power level control circuit which compares a detected power level signal output from the output power detector circuit with a predetermined power level directive signal and generates a control signal to cause said gain control amplifier circuit to change the gain, wherein table data to determine said power level directive signal, depending on the level of required output power, is stored in said storage means.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Jul 7, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024662/0280 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2004
From: TSUTSUI, TAKAYUKI; NAGAMORI, HIROYUKI; MATSUSHITA, KOUICHI
To: RENESAS TECHNOLOGY CORP.; HITACHI HYBRID NETWORK CO., LTD.
Reel/Frame 015330/0001 →
Priority Claims (1)
JP 2003-136767 · May 15, 2003 · national
Continuity (1)
Related Publication 20040229579A1 · Nov 18, 2004