Interconnection pattern design
View Patent ↗An interconnection pattern design, which has an improved reliability under mechanical shock and thermal cycling loads. A semiconductor component comprises a plurality of interconnections aligned into rows and columns to form an interconnection pattern, wherein the interconnections are aligned such that the pattern has substantially rounded or chamfered corners. The present invention provides an improved interconnection life and reliability of ball grid array packages and it is easily implemented.
1. A method for designing a semiconductor component comprising an interconnection pattern formed as a ball grid, wherein the interconnections are designed to align such that the pattern has substantially rounded or chamfered corners, wherein the interconnection pattern is designed to comprise a first plurality of interconnections, which first interconnections are electrically connecting, and a second plurality of interconnections, which second interconnections are electricall non-connecting, on the periphery of the interconnection pattern and/or forming one or more angular or rectangular corners of the interconnection pattern, wherein the second interconnections are relatively weaker than the first interconnections.
2. A method as claimed in claim 1 , wherein joint pattern is designed to a form of a ball grid array in which at least two electrically connecting joints at each corner of the array are missing.
3. A method as claimed in claim 1 , wherein the interconnection pattern is designed to a form of a ball grid in which at least the outermost rows and the outermost columns of the grid have fewer amount of electrically connecting joints than the second outermost rows and the second outermost columns of the grid, and in which the second outermost rows and the second outermost columns of the grid have fewer amount of electrically connecting joints than the third outermost rows and the third outermost columns of the grid.
4. A method as claimed in claim 1 , wherein joint pattern is designed to a form of a ball grid array in which at least two joints at each corner of the array are missing.
5. A method as claimed in claim 1 , wherein the interconnection pattern is designed to a form of a ball grid in which at least the outermost rows and the outermost columns of the grid have fewer amount of joints than the second outermost rows and the second outermost columns of the grid, and in which the second outermost rows and the second outermost columns of the grid have fewer amount of joints than the third outermost rows and the third outermost columns of the grid.
6. A method as claimed in claim 1 wherein a plurality of bonding joints is located about the periphery of the component in an array arrangement in which at least joints of the outermost loop of the array are positioned such that the loop has substantially rounded or chamfered corners.
7. A method as claimed in claim 1 , wherein the joint pattern is designed to comprise a plurality of additional non electrically connecting joints forming at least a part of the substantially rounded or chamfered corners of the pattern.
8. A method as claimed in claim 1 , wherein the joint pattern is designed to comprise a plurality of electrically non-connecting interconnections on the periphery of the interconnection pattern.
9. A method as claimed in claim 1 , wherein the joint pattern is designed to comprise a plurality of electrically non-connecting interconnections forming one or more angular or rectangular corners of the interconnection pattern.
10. A method for designing a semiconductor component comprising an interconnection pattern formed as a ball grid, wherein the interconnections are designed to align such that the pattern has substantially rounded or chamfered corners, wherein the interconnection pattern is designed to comprise a plurality of first interconnections, which first interconnections are electrically connecting, and a plurality of second interconnections, which second interconnections are electrically non-connecting, wherein the second interconnections are on a periphery of the interconnection pattern, and wherein the second interconnections are relatively weaker than the first interconnections.
11. A method for designing a semiconductor component comprising an interconnection pattern formed as a ball grid, wherein the interconnections are designed to align such that the pattern has substantially rounded or chamfered corners, wherein the interconnection pattern is designed to comprise a plurality of first interconnections, which first interconnections are electrically connecting, and a plurality of second interconnections, which second interconnections are electrically non-connecting, wherein the second interconnections are relatively weaker than the first interconnections, and wherein the second interconnections form one or more angular or rectangular corners of the interconnection pattern.