Liquid crystal display
View Patent ↗A liquid crystal display includes an insulating substrate, gate and data lines formed on the substrate to define pixel areas, or collectively a display area. Gate signal interconnection wires are formed at a corner portion of the substrate outside the display area to transmit gate electrical signals, and provided with gate signal interconnection lines and first and second gate signal interconnection pads connected to both ends of the gate signal interconnection lines. A gate insulating layer, and a protective layer are further formed on the substrate, and provided with first and second contact holes exposing the first and second gate signal interconnection pads. Gate and data signal transmission films are attached to the substrate, and provided with first and second gate signal leads and first and second gate signal wires. The first and second gate signal leads are connected to the first and second gate signal interconnection pads through the first and second contact holes. The first or the second gate signal lead completely covers the first or the second contact hole at least in the longitudinal direction of the lead.
1. A liquid crystal display (LCD), comprising:
a first substrate;
a first gate signal wire formed on the first substrate and having a first gate contact pad;
a gate insulation layer formed on the first gate signal wire and having a first opening exposing the first gate contact pad;
a data signal wire formed on the gate insulation layer;
a second gate signal wire formed on the gate insulation layer and having a second contact pad; and
a protection layer formed on the data signal wire and the second gate signal wire and having a second opening aligned with the first opening and exposing the first gate contact pad and a third opening exposing the second gate contact pad.
2. The LCD of claim 1 , further comprising a subsidiary gate contact pad formed on the first gate contact pad and the second gate contact pad.
3. The LCD of claim 2 , further comprising a pixel electrode formed on a same plane with the subsidiary gate contact pad.
4. The LCD of claim 1 , wherein the second gate signal wire is formed on a same plane with the data signal wire.
5. The LCD of claim 1 , further comprising:
a second substrate; and
a signal lead formed on the second substrate and electrically connected to the first gate contact pad and the second gate contact pad.
6. The LCD of claim 5 , further comprising a plurality of conductive particles formed between the first gate contact pad and the signal lead and between the second gate contact pad and the signal lead.
7. The LCD of claim 5 , further comprising an adhesive layer formed between the first substrate and second substrate.