Power supply control apparatus including control circuit chip with reverse-connected battery protection
View Patent ↗In a power supply control apparatus for controlling supplying of power from a battery to a load, a power supply switch circuit chip is connected to the load, to turn ON and OFF a connection between the battery and the load. A control circuit chip is powered by the battery to control the power supply switch circuit chip. The control circuit chip is constructed by an internal circuit for controlling the power supply switch circuit chip, a parasitic diode connected in parallel to the internal circuit, and a depletion type MOS transistor connected in series to the internal circuit. Diode characteristics of the parasitic diode and the depletion type MOS transistor are opposite to each other with respect to the battery. That is, in a forward-connected battery state, the parasitic diode and the depletion type MOS transistor are reverse-biased and forward-biased, respectively. In a reverse-connected battery state, the parasitic diode and the depletion type MOS transistor are forward-biased and reverse-biased, respectively.
1. A power supply control apparatus, comprising:
a first power supply terminal and a second power supply terminal between which a power voltage is supplied;
a control circuit coupled between the first power supply terminal and the second power supply terminal and producing a control signal, the control circuit being formed in a semiconductor substrate as a CMOS circuit;
a power device turned on and off in response to the control signal to control a power supply to a load; and
a depletion type MOS transistor inserted between the control circuit and the first power supply terminal, the depletion type MOS transistor being formed in a well region that is selectively formed in the semiconductor substrate, the depletion type MOS transistor having a source region and a drain region selectively formed in the well region and a gate electrode formed on a gate insulating film covering a channel region between the source and drain regions, one of the source region and drain region, the well region and the gate electrode being connected to the first power supply terminal and the other of the source and drain regions being connected to the semiconductor substrate and the control circuit,
wherein the depletion type MOS transistor representing a first resistance characteristic when the power supply is connected between the first and second power supply terminals in a forward-connected state and a constant current characteristic when the power supply is connected between the first and second power supply terminals in a reverse-connected state, thereby providing a second resistance characteristic.
2. The apparatus as claimed in claim 1 , wherein the CMOS circuit includes an additional well region selectively formed in the semiconductor substrate, the additional well region being connected to the second power supply terminal.
3. The apparatus as claimed in claim 1 , wherein the power device comprises a power MOS transistor of an N-channel type and the depletion type MOS transistor comprises an N-channel type, the power MOS transistor having a gate electrode supplied with the control signal, a first electrode connected to the first power supply terminal, and a second electrode connected to the load.
4. The apparatus as claimed in claim 1 , wherein the power device comprises a power MOS transistor of an N-channel type and the depletion type MOS transistor comprises a P-channel type, the power MOS transistor having a gate electrode supplied with the control signal, a first electrode connected to the first power supply terminal, and a second electrode connected to the load.