Dissection of edges with projection points in a fabrication layout for correcting proximity effects
View Patent ↗Techniques for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. Techniques include selecting from among all edges of all polygons in a proposed layout a subset of edges for which proximity corrections are desirable. The subset of edges includes less than all the edges. Evaluation points are established only for the subset of edges. Corrections are determined for at least portions of the subset of edges based on an analysis performed at the evaluation points. Other techniques include establishing a projection point on a first edge corresponding to the design layout based on whether a vertex of a second edge is within a halo distance. An evaluation point is determined for the first edge based on the projection point and characteristics of the first edge. It is then determined how to correct at least a portion of the edge for proximity effects based on an analysis at the evaluation point.
1. A method of correcting for proximity effects in a layout, the layout including a first layout for a trim mask and a second layout for a phase-shifting mask, the trim mask and the phase-shifting mask used to fabricate a wafer, the method comprising:
identifying edges of the first and second layouts that will print on the wafer;
evaluating the printing edges of the first and second layouts;
dissecting the printing edges of the first and second layouts to form a plurality of segments;
evaluating only a subset of the plurality of segments;
placing evaluation points on the subset of the plurality of segments; and
correcting only the subset of the plurality of segments.
2. The method of claim 1 further comprising:
identifying a first edge of the first and second layouts that will partially print on the wafer;
adding at least one dissection point to the first edge to divide the first edge into a plurality of segments;
placing a first evaluation point on a first segment of the plurality of segments that will print; and
correcting the first segment for proximity effects using the first evaluation point.
3. A method of correcting for proximity effects in a layout, the layout including a first layout for a trim mask and a second layout for a phase-shifting mask, the trim mask and the phase-shifting mask used to fabricate a wafer, the method comprising:
using dissection parameters to select dissection points on an edge of a polygon;
placing an evaluation point between each pair of successive dissection points on the edge; and
determining whether the edge is a last edge of the polygon,
wherein if the edge of the polygon is not a last edge, then determining whether all of the edge is printed on the wafer,
wherein if all the edge is printed, then analyzing the next edge on the polygon.
4. The method of claim 3 , wherein if all the edge is not printed, then
adding at least one additional dissection point to the edge, thereby forming a plurality of segments; and
moving the evaluation point to an important segment of the plurality of segments.
5. The method of claim 4 , further including determining whether any segment of the next edge will print on the wafer, wherein if not, then returning to determining whether the edge is the last edge of the polygon.
6. The method of claim 5 , wherein if any segment of the next edge will print on the wafer, then determining whether any segment in the edge has moved as a result of a last proximity correction.
7. The method of claim 6 , wherein if any segment has moved, then returning to using dissection parameters to select dissection points on the edge.
8. The method of claim 7 , wherein if no segment has moved, then returning to determining whether the edge is the last edge of the polygon.