IP Library Granted Patent US 7,057,454
Granted Patent B2
US 7,057,454 · App. 10/855,861 · Granted Jun 6, 2006

Resistor and switch-minimized variable analog gain circuit

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Quick Facts
Patent No.
US 7,057,454
App. No.
10/855,861
Granted
Jun 6, 2006
Kind
B2
Abstract

A DSM variable high-gain circuit includes a differential amplifier and a negative feedback loop comprising low resistance poly resistors and switches configured in a T-structure having a junction point as part of the negative feedback loop. A third resistor branch of the T-structure includes a switch that connects the junction point through the third resistor branch to ground when in a closed state and that turns the third resistor branch into an open circuit when in an open state The switch of the third resistor branch, when in the closed state, produces a gain at the output of the variable high-gain circuit.

Claims (13)

1. A variable analog gain circuit comprising:

a differential amplifier;

a negative feedback loop; and

a first T resistor network comprised of first, second and third resistor branches joined at a junction point;

wherein the first and second resistor branches are connected in series with the negative feedback loop;

wherein the third branch includes a switch that connects the junction point through the third resistor branch to ground when in a closed state and that turns the third resistor branch into an open circuit when in an open state;

wherein the switch of the third resistor branch, when in the closed state, produces a gain at the output of the variable analog gain circuit; and

wherein the first T resistor network is comprised of low resistance poly resistors and switches.

2. The circuit of claim 1 , wherein the first T resistor network is a distributed T resistor network such that the third resistor branch is a distributed branch comprising at least two sub branches each including a resistor and a switch that connects the junction point through one of the sub branches to ground when in a closed state and that turns the sub branch into an open circuit when in an open state; and

wherein the switches are opened and closed in different combinations to vary the gain produced by the variable analog gain circuit between more than two different gains.

3. The circuit of claim 1 , further comprising a second T resistor network connected in series to the first T resistor network and comprised of first, second and third resistor branches joined at a junction point; and

wherein values of the resistors are selected to produce circuits having desired gain values.

4. The circuit of claim 1 , wherein switches are re-used in different combinations to vary the gain produced by the variable analog gain circuit.

Assignments (6)
MERGER AND CHANGE OF NAME Recorded Jan 17, 2018
From: LANTIQ DEUTSCHLAND GMBH; LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 045086/0015 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 025413/0340 AND 025406/0677 Recorded Apr 17, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 035453/0712 →
GRANT OF SECURITY INTEREST IN U.S. PATENTS Recorded Nov 29, 2010
From: LANTIQ DEUTSCHLAND GMBH
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 025406/0677 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
To: LANTIQ DEUTSCHLAND GMBH
Reel/Frame 024529/0614 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2010
From: INFINEON TECHNOLOGIES AG
To: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
Reel/Frame 024474/0958 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2004
From: MA, FAN YUNG; YU, WEN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 015922/0750 →