Performance of operations on a hardware resource through integral interpretive execution
View Patent ↗A system and methods practiced thereon to effectuate performance of an operation on a hardware resource of the system through integral interpretive execution are described herein.
1. An apparatus comprising:
a first hardware resource, wherein the first hardware resource is a watch dog timer;
first storage medium having stored therein a first abstraction data structure including first one or more instructions to be retrieved and executed to enable a first operation to be performed on the first hardware resource,
second storage medium including a basic input/output system (BIOS), having stored therein a service module including an integral interpreter equipped to interpretively execute the first one or more instructions, when retrieved, to enable performance of the first operation on the first hardware resource, and second one or more instructions designed to access the first abstraction data structure to retrieve the first one or more instructions for the integral interpreter; and
a processor coupled to the first hardware resource, the first storage medium, the second storage medium, and the BIOS to execute the service module, including the second one or more instructions and the integral interpreter;
wherein the first abstraction data structure comprises an Advanced Configuration and Power Interface Specification (ACPI) Description Table of the watch dog timer; and
wherein the apparatus further comprises a second hardware resource;
wherein the first storage medium further comprises
a second abstraction data structure including third one or more instructions to be executed to enable a second operation to be performed on the second hardware resource;
a shared interpreter to interpretively execute the third one or more instructions, when retrieved, to enable performance of the second operation on the second hardware resource;
a scheduler to schedule execution of the shared interpreter; and
a device driver including fourth one or more instructions to request the scheduler to schedule the shared interpreter to interpretively execute the third one or more instructions, when retrieved, to enable performance of the second operation on the second hardware resource; and
the processor is further coupled to the second hardware resource, and provided to execute the device driver, the scheduler, and the shared interpreter.
2. The apparatus of claim 1 , wherein the first operation is an operation selected from a group consisting of a Start Watch Dog Timer operation and a Stop Watch Dog Timer operation.
3. The apparatus of claim 1 , wherein the first operation is an operation selected from a group consisting of a Set Count operation, a Get Count operation, a Reload Count operation, and a Get Status operation.
4. The apparatus of claim 1 , wherein the ACPI Description Table for the watch dog timer comprises a System Description Table Header as follows:
Field
System
Description
Byte
Byte
Table Header
Length
Offset
Description
Signature
4
0
Of any alphanumeric characters,
e.g. ‘WDDT’
Length
4
4
In bytes, of entire WDDT table.
Revision
1
8
Any numeric value, e.g. 1
Checksum
1
9
Any numeric value
OEMID
6
10
OEM Identifier, any alphanumeric
value
OEM Table ID
8
16
OEM table ID, any alphanumeric
value
OEM Revision
4
24
Revision level of Table, any
alphanumeric value
Creator ID
4
28
Vendor ID of the utility that
created the table,
any alphanumeric value
Creator Revision
4
32
Revision of the utility that created
the table, any alphanumeric value.
5. The apparatus of claim 4 , wherein the ACPI Description Table for the watch dog timer further comprises a Capabilities, Configuration and Status Section as follows:
Field
Table Contents
Byte
Byte
(capabilities/
configuration/status)
Length
Offset
Description
WDT Spec Version
2
Watchdog Timer Device Class
Specification Version
WDDT Table
2
Version of this table.
Version
Timer Max Count
2
Contains the maximum counter
value that this WDT
implementation supports.
Timer Min Count
2
Contains the minimum allowable
counter value that this WDT
implementation supports.
Timer Count Period
2
Contains the period of one count
specified in milliseconds that
this WDT supports.
Status
2
Bit 0 - WDT Available bit
(BIOS setup)
0 = permanently disabled
1 = available
Bit 1 - WDT Active bit (BIOS
Setup).
0 = WDT is stopped when BIOS
hands off control
1 = WDT is running when BIOS
hands off control
Bit 2 - reserved 1 for Ownership
bit.
0 = WDT is owned by they
BIOS
1 = WDT is owned by the OS
Bits 3-10 - Reserved
Bit 11 - User Reset Event bit
1 = system reset result of a user-
initiated reset
Bit 12 - WDT Event bit
1 = system reset result of WDT
event
Bit 13 - Power Fail Event bit
1 = system reset result of
abnormal power event
Bit 14 - Unknown Reset Event
bit
1 = system reset result of a reset
that was non user initiated and
not due to the WDT logic
Bit 15 - Reserved
Capability
2
Bit 0 - Auto Reset
Bit 1 - Alert Support
Bit 2 - Reserved for Platform
Directed Shutdown
Bit 3 - Reserved for Immediate
Shutdown
Bit 4 - Reserved for future BIOS
Handoff Support
Bits 5-15 - Reserved.
6. The apparatus of claim 5 , wherein the ACPI Description Table for the watch dog timer further comprises a Device Specific Code Description as follows:
Field
Table Contents
Byte
Byte
(code section)
Length
Offset
Description
Base Address
12
The base address of the WDT
Function
WDT Device functions:
Descriptions
Function
Description
Set Count
Sets the timeout value
Get Count
Returns the timeout
value
Reload
Causes the WDT to be
Count
reloaded
Get Status
Returns the status of
the WDT
Start WDT
Two mutually exclu-
Stop WDT
sive functions to
enable WDT
Shutdown
Three mutually ex-
Reset
clusive actions the
No Action
WDT can take when it
expires
Set Count
12
This code is used to set the count.
Field
Byte
Description
Length
Actions
1
0x01 (Number of
Actions)
Offset
2
0x01
Mask
8
0x3f (Enforce
max count)
Action
2
0x02 (Write Data
AND Mask)
Get Count
12
This code returns the present WDT
count.
Field
Byte
Description
Length
Actions
1
0x01 (Number of
Actions)
Offset
2
0x00
Mask
8
0x3f (Mask off
extraneous bits)
Action
2
0x08 (Read Data
AND Mask)
Reload Count
12
This code causes the WDT to reload
its count register.
Field
Byte
Description
Length
Actions
1
0x01 (Number of
Actions)
Offset
2
0x00
Mask
8
0x00 (Dummy
value)
Action
2
0x04 (Write
Mask)
Start WDT
12
Execution of this code causes the
WDT to begin (or resume) counting.
Field
Byte
Description
Length
Actions
1
0x01 (Number of
Actions)
Offset
2
0x09
Mask
8
0xf7 (Isolate
Enable Bit)
Action
2
0x05 (Write/Read
Data AND Mask)
Stop WDT
12
Execution of this code causes the
WDT to stop counting.
Field
Byte
Description
Length
Actions
1
0x01 (Number of
Actions)
Offset
2
0x09
Mask
8
0x08 (Isolate
Enable Bit)
Action
2
0x06 (Write/Read
Data OR Mask)
Shutdown
24
To shut down WDT when the timer
WDT
expires
Field
Byte
Description
Length
Actions
1
0x01 (Number of
Actions)
Offset
2
0x09
Mask
8
0xf8
Action
2
0x08 (Read AND
Mask)
Offset
2
0x09
Mask
8
0x04
Action
2
0x03 (Write OR
Mask)
Reset WDT
24
To reset WDT when the timer expires
Field
Byte
Description
Length
Actions
1
0x02 (Number of
Actions)
Offset
2
0x09
Mask
8
0xf8
Action
2
0x08 (Read AND
Mask)
Offset
2
0x09
Mask
8
0x02
Action
2
0x03 (Write OR
Mask)
Do Nothing
24
To issue alert, but take no further
WDT
action, when the timer expires
Field
Byte
Description
Length
Actions
1
0x02 (Number of
Actions)
Offset
2
0x09
Mask
8
0xf8
Action
2
0x08 (Read AND
Mask)
Offset
2
0x09
Mask
8
0x01
Action
2
0x03 (Write OR
Mask).
7. The apparatus of claim 1 , wherein the first abstraction data structure comprises an Advanced Configuration and Power Interface Specification (ACPI) Description Table.
8. The apparatus of claim 1 , wherein the service module is a selected one of a basic input/output system service module, an operating system device driver, an operating system loader, and an exception handler.
9. The apparatus of claim 1 , wherein the first and second abstraction data structures comprise a first ACPI Description Table of the first hardware resource, and a second ACPI Description Table of the second hardware resource, respectively.
10. In a computing platform, a method comprising:
a service module included in a basic input/output system (BIOS) of the computing platform directly accessing a first abstraction data structure to retrieve first one or more instructions, designed to enable a first operation on a first hardware resource of the computing platform, when executed;
the service module interpretively executing the retrieved first one or more instructions to enable the first operation on the first hardware resource;
a device driver of the computing platform requesting a scheduler of an operating system to schedule a shared interpreter of the operating system to execute second one or more instructions, when retrieved, to enable a second operation on a second hardware resource;
the scheduler scheduling the shared interpreter to retrieve and execute the second one or more instructions;
the shared interpreter accessing a second abstraction data structure to retrieve the second one or more instructions; and
the shared interpreter interpretively executing the retrieved second one or more instructions to enable the second operation on the second hardware resource
wherein the first abstraction data structure is stored in a first storage module that is separate from the BIOS;
wherein the first and second abstraction data structures comprise a first ACPI Description Table of the first hardware resource, and a second ACPI Description Table of the second hardware resource, respectively;
wherein said accessing by the service module comprises the service module traversing a first Device Specific Code Description of the first ACPI Description Table to retrieve the first one or more instructions; and
wherein said accessing by the shared interpreter comprises the shared interpreter traversing a second Device Specific Code Description of the second ACPI Description Table to retrieve the second one or more instructions.
11. The method of claim 10 , wherein said accessing comprises the device driver traversing a Device Specific Code Description of the ACPI Description Table to retrieve the first one or more instructions.
12. In a computing platform, a method comprising:
a service module included in a basic input/output system (BIOS) of the computing platform directly accessing a first abstraction data structure to retrieve first one or more instructions, designed to enable a first operation on a first hardware resource of the computing platform, when executed;
the service module interpretively executing the retrieved first one or more instructions to enable the first operation on the first hardware resource;
a device driver of the computing platform requesting a scheduler of an operating system to schedule a shared interpreter of the operating system to execute second one or more instructions, when retrieved, to enable a second operation on a second hardware resource;
the scheduler scheduling the shared interpreter to retrieve and execute the second one or more instructions;
the shared interpreter accessing a second abstraction data structure to retrieve the second one or more instructions; and
the shared interpreter interpretively executing the retrieved second one or more instructions to enable the second operation on the second hardware resource
wherein the first abstraction data structure is stored in a first storage module that is separate from the BIOS;
wherein said direct accessing and interpretive executing by said service module are performed prior to the availability of the operating system.
13. An apparatus comprising:
a first storage medium configured to store a first abstraction data structure including first one or more instructions designed to enable performance of a first operation on a first hardware resource of a computing platform, when executed; and
a second storage medium including a basic input/output system (BIOS), having stored therein a service module including an integral interpreter equipped to interpretively execute the first one or more instructions, when retrieved, to enable performance of the first operation on the first hardware resource, and second one or more instructions designed to access the first abstraction data structure to retrieve the first one or more instructions for the integral interpreter;
a processor coupled to the first hardware resource, the first storage medium, the second storage medium, and the BIOS to execute the service module, including the second one or more instructions and the integral interpreter;
a shared interpreter designed to access an abstraction data structure to retrieve one or more instructions, and execute the retrieved one or more instructions to enable performance of an operation on a hardware resource;
a scheduler to schedule execution of the shared interpreter; and
a device driver designed to request the scheduler to schedule the shared interpreter to access a second abstraction data structure to retrieve second one or more instructions, and execute the retrieved second one or more instructions to enable performance of a second operation on a second hardware resource;
wherein the first and second abstraction data structures comprise a first ACPI Description Table of the first hardware resource, and a second ACPI Description Table of the second hardware resource, respectively.
14. A system comprising:
a processor;
a system memory;
a watch dog timer;
a mass storage having stored therein a first ACPI Description Table of the watch dog timer including first one or more instructions to be executed, when retrieved, to enable a first operation to be performed on the watch dog timer;
a read-only memory, separate from the mass storage, having stored therein a basic input/output system (BIOS) that includes a service module including an integral interpreter equipped to interpretively execute the first one or more instructions, when retrieved, to effectuate performance of the first operation on the watch dog timer, and second one or more instructions designed to access the first ACPI Description Table of the watch dog timer to retrieve the first one or more instructions for the integral interpreter; and
a bus coupling the processor, the system memory, the watch dog timer, the read-only memory, and the mass storage to one another;
wherein the apparatus further comprises a hardware resource;
wherein the mass storage further comprises
an abstraction data structure including third one or more instructions to be executed to enable a second operation to be performed on the hardware resource;
a shared interpreter to interpretively execute the third one or more instructions, when retrieved, to enable performance of the second operation on the hardware resource;
a scheduler to schedule execution of the shared interpreter; and
a device driver including fourth one or more instructions to request the scheduler to schedule the interpreter to interpretively execute the third one or more instructions, when retrieved, to enable performance of the second operation on the hardware resource; and
the processor is further coupled to the hardware resource, and provided to execute the device driver, the scheduler, and the shared interpreter.
15. The system of claim 14 , wherein the first operation is an operation selected from a group consisting of a Start Watch Dog Timer operation, a Stop Watch Dog Timer operation, a Set Count operation, a Get Count operation, a Reload Count operation, and a Get Status operation.
16. The system of claim 14 , wherein the system further comprises a controller coupled to the bus, and the watch dog timer is integrated with the controller.
17. The system of claim 14 , wherein the system selected from a group consisting of a set-top box, a digital camera, a digital versatile disk player, and a compact disc player.