Semiconductor device
View Patent ↗A semiconductor device includes a base, a semiconductor element having a plurality of electrodes, a plurality of conductive lines connected to the electrodes of the semiconductor element, plating stubs attached to the conductive lines, and a plurality of wiring layers formed in a plurality of layers on the base. The plating stub attached to a first conductive line, and the plating stubs attached to one or a plurality of second conductive lines adjacent to the first conductive line, exist in different conductive wiring layers.
1. A semiconductor device, comprising:
a base,
a semiconductor element having a plurality of electrodes,
a plurality of conductive lines connected to the electrodes of said semiconductor element, plating stubs attached to said conductive lines, and wiring layers formed in a plurality of layers on said base; and
wherein the plating stub attached to a first conductive line, and the plating stubs attached to one or a plurality of second conductive lines adjacent to said first conductive line, exist in different conductive wiring layers.
2. The semiconductor device according to claim 1 , wherein the first conductive line is connected to ground or a power supply.
3. The semiconductor device according to claim 1 , wherein a distance between the plating stub attached to the first conductive line and the plating stubs attached to the second conductive lines is larger than a minimum line interval between the plating stub attached to the first conductive line and plating stubs existing in the same wiring layer as the plating stub attached to the first conductive line.
4. The semiconductor device according to claim 1 , wherein the signals transmitted by the first conductive line are digital signals.
5. The semiconductor device according to claim 4 , wherein the digital signals have a frequency band of 100 MHz or higher.
6. The semiconductor device according to claim 1 , wherein, compared with the maximum line intervals between adjacent conductive lines, the plating stubs attached to the conductive lines are formed with larger line intervals.
7. The semiconductor device according to claim 6 , comprising a first conductive line, a second conductive line, and a plating stub attached to the first conductive line, wherein the first conductive line and the plating stub are arranged to be adjacent to the second conductive line, and the line maximum interval between said plating stub and said second conductive line is formed larger than the line interval between the first conductive line and second conductive line.
8. A semiconductor device, comprising:
a base having two faces, a central portion and a peripheral portion,
a semiconductor element provided on one face of the base and having a plurality of electrodes,
a plurality of conductive lines connected to the electrodes of said semiconductor element,
said conductive lines are formed from said electrodes toward the face opposite of the face of the base on which the semiconductor element is provided, spanning a plurality of wiring layers, and from said peripheral portion of the base toward said central portion, and
said plating stubs are formed in the wiring layers of the face on the side of said semiconductor element, from the conductive lines to said peripheral portion of the base.
9. A semiconductor device, comprising a plurality of conductive wiring layers, a semiconductor element having a plurality of electrodes, first and second conductive lines connected to the electrodes of the semiconductor element, and a plating stub attached to said first conductive line, wherein said first conductive line and the plating stub are arranged adjacent to the second conductive line, and the line width of said plating stub is formed smaller than the line widths of said first and/or second conductive lines, wherein the plating stub attached to the first conductive line and a plating stub attached the second conductive line are in different conductive wiring layers.