IP Library Granted Patent US 7,170,576
Granted Patent B2
US 7,170,576 · App. 10/867,809 · Granted Jan 30, 2007

Thin film transistor array substrate and fabricating method thereof

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Quick Facts
Patent No.
US 7,170,576
App. No.
10/867,809
Granted
Jan 30, 2007
Kind
B2
Abstract

A thin film transistor array substrate having spacers formed without sacrificing an aperture ratio and a method for fabricating the same. The thin film transistor array substrate according to the present invention includes a gate line on a substrate; a gate insulating film on the gate line; a data line on the gate insulating film, the data line crossing the gate line to define a pixel region and the gate insulating film between the gate line and the data line, wherein at least one of the gate line and the data line includes a protrusion; a thin film transistor at a crossing the gate line and the data line; a pixel electrode at the pixel region, the pixel electrode connected to the thin film transistor; and a spacer within the protrusion dispensed by an ink-jet system.

Claims (34)

1. A thin film transistor array substrate comprising:

a gate line on a substrate;

a gate insulating film on the gate line;

a data line on the gate insulating film, the data line crossing the gate line to define a pixel region and the gate insulating film between the gate line and the data line, wherein at least one of the gate line and the data line includes a protrusion extending toward the pixel region and having a shape of a polygon including a rectangle or a circle, and the protrusion has a width ranging from about 30 μm to about 50 μm;

a thin film transistor at a crossing the gate line and the data line;

a pixel electrode at the pixel region, the pixel electrode connected to the thin film transistor; and

a spacer within the protrusion dispensed by an ink-jet system, wherein the width of the protrusion is wider than a width of the spacer.

2. The thin film transistor array substrate according to claim 1 , further comprising a storage capacitor having the gate line and the pixel electrode as storage capacitor electrodes and having the gate insulating film and a passivation film between the storage capacitor electrodes as a dielectric material for the storage capacitor.

3. The thin film transistor array substrate according to claim 1 , wherein the spacer has a shape of a semi-circle or a semi-oval.

4. The thin film transistor array substrate according to claim 1 , wherein the thin film transistor further includes:

a gate electrode connected to the gate line;

a source electrode connected to the data line;

a drain electrode connected to the pixel electrode; and

a semiconductor layer forming a channel portion of the thin film transistor.

5. The thin film transistor array substrate according to claim 4 , wherein the semiconductor layer is formed below the data line, the source electrode, the drain electrode and the lower data pad electrode along them.

6. A method of fabricating a thin film transistor array substrate, comprising:

forming a gate line on a substrate;

forming a gate insulating film on the gate line;

forming a data line on the gate insulating film, the data line crossing the gate line to define a pixel region and the gate insulating film between the gate line and the data line, wherein at least one of the gate line and the data line includes a protrusion extending toward the pixel region and having a shape of a polygon including a rectangle or a circle, and the protrusion has a width ranging from about 30 μm to about 50 μm;

forming a thin film transistor at a crossing of the gate line and the data line;

forming a pixel electrode at the pixel region, the pixel electrode connected to the thin film transistor; and

forming a spacer within the protrusion by an ink-jet system, wherein the width of the protrusion is wider than a width of the spacer.

7. The method according to claim 6 , further including forming a storage capacitor having the gate line and the pixel electrode as storage capacitor electrodes and having the gate insulating film and a passivation film between the storage capacitor electrodes as a dielectric material for the storage capacitor.

8. The method according to claim 6 , wherein the spacer has a shape of a semi-circle or a semi-oval.

9. A method of fabricating a liquid crystal display (LCD) device, comprising:

forming a gate line on a lower substrate;

forming a data line crossing the gate line to define a pixel region, wherein at least one of the data line and the gate line has a protrusion extending toward the pixel region and having a shape of a polygon including a rectangle or a circle, and the protrusion has a width ranging from about 30 μm to about 50 μm;

forming a thin film transistor at a crossing of the gate line and the data line, the thin film transistor including a source electrode, a drain electrode and a gate electrode;

forming a pixel electrode at the pixel region, the pixel electrode connected to the drain electrode of the thin film transistor; and

forming a spacer within the protrusion by a dispenser, wherein the width of the protrusion is wider than a width of the spacer.

10. The method according to claim 9 , further comprising bonding a upper substrate to the lower substrate, wherein the upper substrate has a black matrix.

11. The method according to claim 10 , wherein the black matrix overlaps the spacer in the protrusion.

12. The method according to claim 10 , wherein the spacer maintains a cell gap between the upper and lower substrates.

13. The method according to claim 9 , further comprising forming a storage capacitor, wherein the spacer overlaps the storage capacitor.

Assignments (2)
CHANGE OF NAME Recorded Oct 17, 2008
From: LG. PHILIPS LCD CO., LTD.
To: LG DISPLAY CO., LTD.
Reel/Frame 021773/0029 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2004
From: JUN, JAE HONG; LEE, YUN BOK
To: LG. PHILIPS LCD CO., LTD
Reel/Frame 015483/0454 →