Piezoelectric oscillating circuit, method for manufacturing the same and filter arrangement

1. A method for manufacturing a piezoelectric oscillating circuit in thin film technology, wherein the piezoelectric oscillating circuit comprises a predetermined natural frequency, and wherein the piezoelectric oscillating circuit includes a piezoelectric layer having two opposing surfaces, a bottom electrode on one of the opposing surfaces and a top electrode on the other of the opposing surfaces, the method comprising:

(a) depositing a first material which forms a first top electrode layer of the top electrode and which causes a first frequency change of the piezoelectric oscillating circuit depending on a thickness change of the first top electrode layer;

(b) etching the first material for performing a first frequency correction such that a thinned first top electrode layer remains;

(c) depositing a second material which forms a second top electrode layer on the thinned first top electrode layer and which causes a second frequency change of the piezoelectric oscillating circuit depending on a thickness change of the second top electrode layer, wherein the first frequency change is greater than the second frequency change; and

(d) etching the second material for performing a second frequency correction such that a thinned second top electrode layer remains.

2. The method according to claim 1 , wherein the first frequency correction in step (b) causes a coarse setting of the frequency, and wherein the second frequency correction in step (d) causes a fine setting of the frequency.

3. The method according to claim 1 , including the following steps after step (a) and after step (b):

determining the natural frequency of the structure resulting after step (a) and after step (b), respectively; and

depending on the determined natural frequency of the structure and depending on the desired natural frequency of the piezoelectric oscillating circuit, determining a required thickness change of the first top electrode layer and the second top electrode layer for the first frequency correction and for the second frequency correction.

4. The method according to claim 1 , comprising the following steps:

(e) generating at least a third top electrode layer on the second top electrode layer; and

(f) performing a third frequency correction by reducing or increasing the thickness of the third top electrode layer generated in step (e).

5. The method according to claim 1 , wherein a plurality of piezoelectric oscillating circuits are generated on a wafer, wherein in step (a) on the wafer the at least one first top electrode layer for a number of the piezoelectric oscillating circuits is generated in a structured way, wherein in step (b) the first frequency correction is applied to the overall wafer, wherein in step (c) the at least one second top electrode layer is generated for all piezoelectric oscillating circuits in a structured way, and wherein in step (d) the second frequency correction is applied to the overall wafer.

6. The method according to claim 5 , wherein the first frequency correction and the second frequency correction include the step-wise processing of different areas of the wafer.

7. The method according to claim 1 , wherein step (a) includes the following steps:

(a.1.) providing a substrate;

(a.2.) generating the bottom electrode on at least one portion of the substrate;

(a.3.) generating the piezoelectric layer on at least one portion of the bottom electrode; and

(a.4.) generating the first top electrode layer for the top electrode on at least one portion of the piezoelectric layer.

8. The method according to claim 7 , wherein step (a.1.) includes generating an acoustic insulator on or in the substrate in order to prevent a leaking of the acoustic oscillation into the substrate.

9. The method according to claim 7 , wherein the first top electrode layer is manufactured from an acoustically dense material, and wherein the second top electrode layer is manufactured from a material whose acoustic density is lower compared to the material of the first top electrode layer.

10. The method according to claim 9 , wherein the top electrode or the bottom electrode are manufactured from aluminum or tungsten.