IP Library Granted Patent US 7,472,151
Granted Patent B2
US 7,472,151 · App. 10/871,219 · Granted Dec 30, 2008

System and method for accelerating arithmetic decoding of video data

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,472,151
App. No.
10/871,219
Granted
Dec 30, 2008
Kind
B2
Abstract

Presented herein is a system and apparatus for accelerating arithmetic decoding of encoded data. In one embodiment, there is presented a symbol interpreter for decoding CABAC coded data. The symbol interpreter comprises a first memory, a CABAC decoding loop, and a syntax assembler. The first memory receives a bitstream comprising the CABAC coded data at a channel rate. The CABAC decoding loop decodes the CABAC symbols at the channel rate, and comprises an arithmetic decoder for generating binary symbols from the CABAC coded data at the channel rate. The syntax assembler decodes the binary symbols at a consumption rate.

Claims (39)

1. A method for decoding context adaptive binary arithmetic coded data, said method comprising:

receiving a bitstream comprising the context adaptive binary arithmetic coded data at a channel rate;

decoding the context adaptive binary arithmetic coded data at the channel rate, wherein decoding the context adaptive binary arithmetic coded data at the channel rate comprises generating bins from the context adaptive binary arithmetic coded data at the channel rate; and

decoding the bins at a consumption rate, wherein the context adaptive binary arithmetic coded data encodes video data, and wherein the consumption rate corresponds to a display rate of the encoded video data.

2. The method of claim 1 , wherein decoding the context adaptive binary arithmetic coded data at the channel rate comprises:

generating syntax elements from the bins at the consumption rate;

selecting context table entries for decoding a portion of the bins on the basis of a portion of the syntax elements, the portion of the syntax elements corresponding to another portion of the bins, the another portion of the bins preceding the portion of the bins.

3. The method of claim 2 , wherein decoding the bins at the consumption rate further comprises:

generating syntax elements from the bins at the consumption rate.

4. The method of claim 1 , further comprising:

writing the bins to a memory.

5. The method of claim 4 , further comprising:

requesting the bins from the memory at the consumption rate.

6. A decoder for decoding context adaptive binary coded data, said decoder comprising:

a first memory for receiving at a channel rate, a bitstream comprising the context adaptive binary coded data;

a context adaptive binary arithmetic coded data decoding loop for decoding the context adaptive binary arithmetic coded data at the channel rate, the context adaptive binary arithmetic coded data decoding loop comprising an arithmetic decoder for generating bins from the context adaptive binary arithmetic coded data at the channel rate; and

a syntax assembler for decoding the bins at a consumption rate, thereby generating syntax elements, wherein the context adaptive binary arithmetic coded data encodes video data, and wherein the consumption rate corresponds to a display rate of the encoded video data.

7. The decoder of claim 6 , wherein the context adaptive binary arithmetic coded data decoding loop further comprises:

another syntax assembler for generating syntax elements from the bins at the channel rate;

a selector for selecting context table entries for decoding a portion of the bins on the basis of a portion of the syntax elements, the portion of the syntax elements corresponding to another portion of the bins, the another portion of the bins preceding the portion of the bins.

8. The decoder of claim 6 , further comprising:

another memory for storing the bins.

9. The decoder of claim 8 , wherein the syntax assembler requests the bins from the memory at the consumption rate.

10. The decoder of claim 9 , wherein the syntax assembler pulls the bins from the memory at the consumption rate.

11. The decoder of claim 6 , wherein the context adaptive binary arithmetic coded data decoding loop accesses a context table RAM.

12. A decoder for decoding context adaptive binary arithmetic coded data, said decoder comprising:

a first memory for receiving at a channel rate, a bitstream comprising the context adaptive binary arithmetic coded data;

a context adaptive binary arithmetic coded data decoding loop operably coupled to the first memory to decode the context adaptive binary arithmetic coded data at the channel rate, the context adaptive binary arithmetic coded data decoding loop further comprising an arithmetic decoder operably coupled to the first memory to generate bins from the context adaptive binary arithmetic coded data at the channel rate; and

a syntax assembler operably coupled to the arithmetic decoder to decode the bins at a consumption rate, thereby generating syntax elements; and

wherein the context adaptive binary arithmetic coded data encodes video data, and wherein the consumption rate corresponds to a display rate of the encoded video data.

13. The decoder of claim 12 , wherein the context adaptive coded decoding loop further comprises:

another syntax assembler operably coupled to the arithmetic decoder to generate syntax elements from the bins at the channel rate; and

a selector operably coupled to the other syntax assembler, said selector for selecting context table entries for decoding a portion of the bins on the basis of a portion of the syntax elements, the portion of the syntax elements corresponding to another portion of the bins, the another portion of the bins preceding the portion of the bins.

14. The decoder of claim 12 , further comprising:

another memory operably coupled to the arithmetic decoder, said another memory operable to store the bins generated by the arithmetic decoder.

15. The decoder of claim 14 , wherein the syntax assembler is operable to request the bins from the memory at the consumption rate.

16. The decoder of claim 14 , wherein the another memory operable to store the bins generated by the arithmetic decoder further comprises RAM.

17. The decoder of claim 14 , wherein the another memory operable to store the bins generated by the arithmetic decoder further comprises SDRAM.

18. The decoder of claim 12 , wherein the context adaptive binary arithmetic coded data decoding loop accesses a context table RAM.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2009
From: BROADCOM ADVANCED COMPRESSION GROUP, LLC
To: BROADCOM CORPORATION
Reel/Frame 022299/0916 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2005
From: SCHUMANN, REINHARD
To: BROADCOM ADVANCED COMPRESSION GROUP LLC
Reel/Frame 015668/0668 →