IP Library Granted Patent US 7,267,781
Granted Patent B2
US 7,267,781 · App. 10/871,689 · Granted Sep 11, 2007

Method of fabricating optical filters

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Quick Facts
Patent No.
US 7,267,781
App. No.
10/871,689
Granted
Sep 11, 2007
Kind
B2
Abstract

A method of fabricating optical filter is disclosed. The method includes providing the substrate and selectively etching the substrate to form a plurality of freestanding layers. A plurality of dielectric layers is disposed over an outer surface of each of the freestanding layers. The resultant optical filters may be used in a variety of applications including etalon applications.

Claims (39)

1. A method of fabricating optical filters comprising:

providing a substrate;

etching said substrate to farm a plurality of freestanding layers; and

depositing a plurality of dielectric layers over an outer surface of each of said freestanding layers,

wherein the method forms an optical filter.

2. A method as recited in claim 1 , further comprising removing said freestanding layers and said plurality of dielectric layers from said substrate.

3. A method as recited in claim 1 , wherein said substrate is silicon.

4. A method as recited in claim 1 , wherein said freestanding layers have side surfaces in defined crystalline planes.

5. A method as recited in claim 1 , wherein said depositing is carried out using a method of the group consisting essentially of: ALD, CVD), LPCVD, PECVD and MOCVD.

6. A method as recited in claim 1 , wherein said plurality of dielectric layer further comprises 10 to 100 layers.

7. A method as recited in claim 1 , wherein said substrate is monocrystalline silicon.

8. A method as recited in claim 1 , wherein said substrate has a <110> top surface.

9. A method as recited in claim 1 , wherein said freestanding layers have sidewalls in the <111> crystalline plane.

10. A method as recited in claim 9 , wherein said planes are substantially vertical.

11. A method as recited in claim 9 , wherein said freestanding layers have a substantially trapezoidal cross-section.

12. A method as recited in claim 1 , wherein said plurality of dielectric layers is chosen from the group consisting essentially of aluminum oxide, titanium oxide, silicon oxide, cesium oxide and tantalum oxide.

13. A method as recited in claim 1 , wherein said freestanding layers are silicon and the method further comprises oxidizing said silicon prior to depositing said plurality of dielectric layers.

14. A method of fabricating an optical etalon, the method comprising:

providing a substrate;

selectively etching said substrate to form at least two substantially parallel freestanding layers and handles; and

depositing a plurality of dielectric layers over an outer surface of said freestanding layers,

wherein the method fonna an optical etalon.

15. A method as recited in claim 14 , wherein said freestanding layers have side surfaces in defined crystalline planes.

16. A method as recited in claim 14 , wherein said depositing is carried out using a method of the group consisting essentially of: ALD, CVD, LPCVD, PECVD and MOCVD.

17. A method as recited in claim 14 , wherein a distance between said at least two freestanding layers is substantially fixed.

18. A method as recited in claim 14 , wherein a distance between said at least two freestanding layers is variable.

19. A method as recited in claim 18 , further comprising depositing a layer of transparent conductive material over said at least two freestanding layers.

20. A method as recited in claim 14 , wherein said plurality of dielectric layers is chosen from the group consisting essentially of aluminum oxide, titanium oxide, silicon oxide, cesium oxide and tantalum oxide.

21. A method of fabricating an etalon, the method comprising:

providing a substrate;

selectively etching said substrate to form at least one freestanding layer;

depositing a plurality of dielectric layers over said at least one freestanding layer on opposed sidewalls of said freestanding layer; and

removing said freestanding layer,

wherein the method forms an etalon.

22. A method as recited in claim 21 , wherein said at least one freestanding layer has a thickness, and said thickness equals a spacing of the etalon.

23. A method as recited in claim 21 , wherein said sidewalls are in defined crystalline planes.

24. A method as recited in claim 21 , wherein said sidewalls are substantially parallel.

25. A method as recited in claim 1 , wherein said etching further comprises dry etching a plurality of hales through said substrate followed by anisotropically etching said holes.

26. A method as recited in claim 25 , wherein said anisotropic etching is a wet etching step.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2011
From: NUVOTRONICS, LLC
To: IP CUBE PARTNERS CO. LTD.
Reel/Frame 025950/0878 →