Method for forming inductor in semiconductor device
View Patent ↗The present invention relates to a method for manufacturing an inductor being a passive device in RE MEMS, RFCMOS, Bipolor/SiGe and BiCMOS semiconductor devices. According to the present invention, a first negative photoresist layer is covered on a substrate having a lower electrode. A via hole that will become a contact portion of the inductor is then defined by means of an exposure process using a first mask. A second negative photoresist layer is covered on the first negative photoresist layer. Trenches that will become line portions of the inductor are defined by an exposure process using a second mask. A damascene pattern having the via hole and the trenches is formed by means of a developing process and is then buried with copper, thus forming the inductor. Not only a thickness of the trenches in the line portion and a thickness of the via hole in the contact portion can be uniformly controlled, but also their height can be easily controlled. Therefore, that an inductor of a high quality can be manufactured.
1. A method for forming an inductor in a semiconductor device, comprising the steps of:
forming a first negative photoresist layer on a substrate including a lower electrode;
performing an exposure process for the first negative photoresist layer to form a first non-exposure region in the lower electrode portion;
performing a first post expose bake process after the exposure process for the first negative photoresist layer;
covering a second negative photoresist layer on the first negative photoresist layer;
performing an exposure process for the second negative photoresist layer to form a second non-exposure region including the top of the first non-exposure region;
performing a second post expose bake process after the exposure process for the second negative photoresist layer;
implementing a developing process whereby a via hole is formed in the first negative photoresist layer and trenches are formed in the second negative photoresist layer; and
burying the via hole and the trenches with a conductive material.
2. The method as claimed in claim 1 , wherein a soft bake process is performed after the first and second negative photoresist layers are covered.
3. The method as claimed in claim 1 , wherein after the developing process is performed, the first and second negative photoresist layers are baked.
4. The method as claimed in claim 1 , further comprising the step of before the second negative photoresist layer is covered, water-soluble BARC is covered as an anti-exposure and developing film on the first negative photoresist layer in which the first non-exposure region is formed.
5. The method as claimed in claim 1 , wherein the conductive material is copper.
6. The method as claimed in claim 1 , further comprising the step of after the conductive material is buried, stripping the first and second positive photoresist layers.
7. A method for forming an inductor in a semiconductor device, comprising the steps of:
forming a first negative photoresist layer on a substrate including a lower electrode;
performing an exposure process for the first negative photoresist layer to form a first non-exposure region in the lower electrode portion;
covering water-soluble BARC on the first negative photoresist layer in which the first non-exposure region is formed;
covering a second negative photoresist layer on the first negative photoresist layer;
performing an exposure process for the second negative photoresist layer to form a second non-exposure region including the top of the first non-exposure region;
implementing a developing process whereby a via hole is formed in the first negative photoresist layer and trenches are formed in the second negative photoresist layer; and
burying the via hole and the trenches with a conductive material.
8. The method as claimed in claim 7 , wherein a soft bake process is performed after the first and second negative photoresist layers are covered.
9. The method as claimed in claim 8 , wherein a post expose bake process is performed after performing the exposure process for the first and second negative photoresist layers.
10. The method as claimed in claim 7 , wherein after the developing process is performed, the first and second negative photoresist layers are baked.
11. The method as claimed in claim 7 , wherein the conductive material is copper.
12. The method as claimed in claim 7 , further comprising the step of after the conductive material is buried, stripping the first and second positive photoresist layers.