Liquid crystal display panel with reduced parasitic impedance
A liquid crystal display includes an array substrate, a data line, a gate line, a first and a second storage wiring, and a second substrate. The data line is disposed on the array substrate and intersects the gate line near a first pixel region. A second substrate, such as a color filter substrate, includes a second pixel region that corresponds to the first pixel region. The first storage wiring is positioned near an edge of the array substrate and the second storage wiring is disposed on the second substrate near an edge of the second substrate.
1. A liquid crystal display panel, comprising:
an array substrate;
a plurality of gate lines and a plurality of data lines disposed on the array substrate forming a plurality of pixel regions at a pixel portion;
a pixel electrode positioned within each pixel region;
a switch positioned within each pixel region;
a storage line insulated from each gate line at a predetermined interval and arranged in a gate line direction;
first storage wirings disposed near an outer edge portion of the array substrate;
a storage signal supply wire positioned outside the pixel portion of the array substrate; and
a color filter substrate having a pixel portion corresponding to the pixel portion of the array substrate and having a second storage wiring positioned outside of the pixel portion.
2. The liquid crystal display panel of claim 1 further comprising a gate driving circuit and a data driving circuit disposed near a perimeter of the array substrate.
3. The liquid crystal display panel of claim 1 where the first storage wirings comprise the storage signal supply wire that extends in the data line direction and at least one connection formed at an end of the storage signal supply wire.
4. The liquid crystal display panel of claim 1 where the first storage wirings are connected to a data driving circuit that receives a storage signal.
5. The liquid crystal display panel of claim 1 wherein the first storage wirings are connected to a gate driving circuit that receives a storage signal.
6. The liquid crystal display panel of claim 1 further comprising a silver dot pattern disposed on at least one corner of pixel portion of the array substrate.
7. The liquid crystal display panel of claim 1 further comprising at least one conductive dot pattern disposed at the first storage wiring.
8. The liquid crystal display panel of claim 7 where the second storage wiring of the color filter substrate is electrically coupled to the first storage wirings of the array substrate by the conductive dot pattern so that a storage voltage forms an equipotential across an entire liquid crystal display panel.
9. The liquid crystal display panel of claim 1 further comprising a storage voltage source coupled to the storage line and being configured to source a storage voltage that forms almost an equipotential across an entire liquid crystal display panel.
10. The liquid crystal display panel of claim 1 where each storage line forms a storage capacitor within a pixel region.
11. A liquid crystal display panel comprising:
an array substrate;
a data line disposed on the array substrate;
a gate line intersecting the data line near a first pixel region;
a first storage wiring disposed near an edge of the array substrate;
a second substrate comprising a second pixel region corresponding to the first pixel region;
a storage signal supply wire positioned outside a pixel portion of the array substrate; and
a second storage wiring disposed on the second substrate near an edge of the second substrate.
12. The liquid crystal display panel of claim 11 where the second substrate comprises a color filter substrate.
13. The liquid crystal display of claim 11 where the first storage wiring is coupled to the second storage wiring.
14. The liquid crystal display panel of claim 11 further comprising a storage voltage source coupled to the first storage wiring, where the storage voltage source is configured to source a storage voltage that forms almost an equipotential across an entire liquid crystal display panel.
15. The liquid crystal display panel of claim 11 where the first storage wiring and the second storage wiring are dimensioned to reduce an internal impedance.
16. The liquid crystal display panel of claim 15 where the internal impedance comprises a nonlinear impedance.
17. The liquid crystal display panel of claim 15 where the internal impedance comprises a linear impedance.
18. The liquid crystal display panel of claim 11 where the first storage wiring and the second storage wiring are coupled together by a silver paste.
19. The liquid crystal display panel of claim 11 where the first storage wiring and the second storage wiring are coupled together by a dot pattern.
20. The liquid crystal display panel of claim 11 wherein the first storage wiring is coupled to a gate driving circuit that receives a storage signal.