IP Library Granted Patent US 7,385,447
Granted Patent B1
US 7,385,447 · App. 10/879,940 · Granted Jun 10, 2008

Power amplifier having curve-fitting predistorter

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Quick Facts
Patent No.
US 7,385,447
App. No.
10/879,940
Granted
Jun 10, 2008
Kind
B1
Abstract

A power amplifier has a plurality of amplifier stages. One or more predistorters are each placed between amplifier stages within the power amplifier path. The predistorters set breakpoints in a predistortion curve and divide the predistortion curve into a plurality of segments. Each predistorter may be adjusted to change the slope of each segment. This adjustment forms a piecewise curve-fit to approximate the inverse of the amplifier transfer characteristic. The curve-fit can be made arbitrarily close to the amplifier transfer characteristic by the selection of a sufficient number of breakpoints and therefore a sufficient number of predistortion curve segments, leading to a satisfactory linearization of the power amplifier.

Claims (42)

1. A power amplifier comprising:

an input amplifier stage receiving a first input signal and producing a first output signal in response thereto;

a predistorter receiving the first output signal and producing a predistorted signal in response thereto according to a predistortion function, the predistorter further comprising:

a first diode and a first capacitor connected in parallel between a first node and a common node;

a second diode and a second capacitor connected in parallel between a second node and the common node; and

an attenuation circuit between the first node and the second node; and

an output amplifier stage receiving the predistorted signal and producing a second output signal in response thereto according to an amplifier transfer function characterized by a linear region and a compression region,

wherein the predistorted function compensates for the compression region of the amplifier transfer function.

2. The power amplifier of claim 1 , wherein the predistorter comprises at least one diode arranged in a shunt configuration.

3. The power amplifier of claim 1 , wherein the attenuation circuit comprises a third resistor in series with a third capacitor.

4. A power amplifier comprising:

at least a first, a second and a third amplifier stages;

a first predistorter circuit between the first and second amplifier stages, and

a second predistorter circuit between the second and third amplifier stages.

5. The power amplifier of claim 4 wherein the first predistorter circuit comprises a first resistor in series with a first subcircuit, the first subcircuit comprising a first pair of antiparallel diodes connected in parallel with a second resistor.

6. The power amplifier of claim 4 wherein the second predistorter circuit comprises a third resistor in series with a second subcircuit, the second subcircuit comprising a second pair of antiparallel diodes connected in parallel with a fourth resistor.

7. The power amplifier of claim 4 , further comprising a fourth amplifier stage and a third predistorter circuit between the third and fourth amplifier stages.

8. The power amplifier of claim 7 wherein the third predistorter circuit comprises a fifth resistor in series with a third subcircuit, the third subcircuit comprising a third pair of antiparallel diodes connected in parallel with a sixth resistor.

9. A wireless communication device having a power amplifier therein, the power amplifier comprising:

a first amplifier stage receiving a first input signal and producing a first output signal in response thereto;

a predistorter receiving the first output signal and producing a predistorted signal in response thereto, the predistorter comprising:

a first diode and a first capacitor connected in parallel between a first node and a common node;

a second diode and a second capacitor connected in parallel between a second node and the common node; and

an attenuation circuit between the first node and the second node; and

a second amplifier stage receiving the predistorted signal and producing a second output signal in response thereto.

10. The wireless communication device of claim 9 , wherein the wireless communication device is a cellular telephone.

11. The wireless communication device of claim 9 , wherein the wireless communication device is a handheld communication device.

12. A wireless communication device having a power amplifier therein, the power amplifier comprising:

at least a first, a second and a third amplifier stages;

a first predistorter circuit between the first and second amplifier stages, and

a second predistorter circuit between the second and third amplifier stages.

13. The wireless communication device of claim 12 , wherein:

the first predistorter circuit comprises a first resistor in series with a first subcircuit, the first subcircuit comprising a first pair of antiparallel diodes connected in parallel with a second resistor; and

the second predistorter circuit comprises a third resistor in series with a second subcircuit, the second subcircuit comprising a second pair of antiparallel diodes connected in parallel with a fourth resistor.

14. The wireless communication device of claim 13 , wherein the wireless communication device is a cellular telephone.

15. The wireless communication device of claim 13 , wherein the wireless communication device is a handheld communication device.

16. A power amplifier comprising:

an input amplifier stage receiving a first input signal and producing a first output stage in response thereto;

a predistorter receiving the first output signal and producing a predistorted signal in response thereto according to a predistortion function;

an output amplifier stage receiving the predistorted signal and producing a second output signal in response thereto according to an amplifier transfer function characterized by a linear region and a compression region;

a first interstage matching network for matching an output impedance of the input amplifier stage to an input impedance of the predistorter; and

a second interstage matching network for matching an output impedance of the predistorter to an input impedance of the output amplifier.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: II-VI OPTOELECTRONIC DEVICES, INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 042551/0708 →
CHANGE OF NAME Recorded May 1, 2017
From: ANADIGICS, INC.
To: II-VI OPTOELECTRONIC DEVICES, INC.
Reel/Frame 042381/0761 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS NUMBER 6790900 AND REPLACE IT WITH 6760900 PREVIOUSLY RECORDED ON REEL 034056 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Nov 21, 2016
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040660/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 037973 FRAME: 0226. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded May 18, 2016
From: ANADIGICS, INC.
To: II-VI INCORPORATED
Reel/Frame 038744/0835 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2016
From: II-VI INCORPORATED
To: ANADIGICS, INC.
Reel/Frame 038119/0312 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 1, 2016
From: ANADIGICS, INC.
To: II-IV INCORPORATED
Reel/Frame 037973/0226 →
RELEASE OF SECURITY INTEREST Recorded Mar 1, 2016
From: SILICON VALLEY BANK
To: ANADIGICS, INC.
Reel/Frame 037973/0133 →
SECURITY AGREEMENT Recorded Oct 27, 2014
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034056/0641 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2004
From: ADAR, AHARON
To: ANADIGICS, INC.
Reel/Frame 015534/0445 →