Communication apparatus including dual timer units
View Patent ↗A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a first timing circuit that provides timed signals to control timing of system operations during an active mode of operation of the digital processing circuit, and a second timing circuit that provides timing signals to control timing of system operations during an active mode of operation of the radio frequency circuit. In one particular embodiment, at least a portion of the first timing circuit is disabled when the radio frequency circuit is active (receiving and/or transmitting).
1. A communication apparatus comprising:
a radio frequency (RF) circuit configured to operate on a radio frequency signal, and
a digital processing circuit coupled to the RF circuit, wherein the digital processing circuit includes a first timing circuit and a second timing circuit;
wherein the first timing circuit is configured to provide timed signals controlling timing of system operations during an active mode of operation of the digital processing circuit, and wherein the second timing circuit is configured to provide timed signals controlling timing of system operations during an active mode of operation of the RF circuit; and
wherein a time value is transferred from the first timing circuit to the second timing circuit to synchronize a transfer of control of the timing of system operations to the second timing circuit.
2. The communication apparatus as recited in claim 1 , wherein at least a portion of the first timing circuit is disabled during the active mode of operation of the RF circuit.
3. The communication apparatus as recited in claim 2 , wherein portions of the digital processing circuit in addition to the first timing circuit are disabled during the active mode of operation of the RF circuit.
4. The communication apparatus as recited in claim 3 , wherein the portions of the digital processing circuit are disabled in response to a signal generated by the second timing circuit.
5. The communication apparatus as recited in claim 2 , wherein the at least a portion of the first timing circuit is disabled in response to a signal generated by the second timing circuit.
6. The communication apparatus as recited in claim 2 , wherein the at least a portion of the first timing circuit is disabled by a signal that disables one or more clocks that clock the first timing circuit.
7. The communication apparatus as recited in claim 2 , wherein the active mode of operation of the RF circuit is a transmission mode of operation.
8. The communication apparatus as recited in claim 2 , wherein the active mode of operation of the RF circuit is a reception mode of operation.
9. The communication apparatus as recited in claim 2 , wherein the at least a portion of the first timing circuit disabled during the active mode of operation of the RF circuit is enabled during the active mode of operation of the digital processing circuit.
10. The communication apparatus as recited in claim 9 , wherein the at least a portion of the first timing circuit is enabled in response to a signal generated by the second timing circuit.
11. The communication apparatus as recited in claim 9 , wherein at least a portion of the first timing circuit is enabled during the active mode of operation of the digital processing circuit by a signal that enables one or more clocks that clock the first timing circuit.
12. The communication apparatus as recited in claim 2 , wherein the second timing circuit is configured to provide the timed signals during the active mode of operation of the RF circuit in response to a signal indicative of a change from the active mode of operation of the digital processing circuit to the active mode of operation of the RF circuit.
13. The communication apparatus as recited in claim 12 , wherein the signal indicative of the change from the active mode of operation of the digital processing circuit to the active mode of operation of the RF circuit is provided by the first timing circuit.
14. The communication apparatus as recited in claim 12 , wherein the first timing circuit includes a first counter for maintaining a system time, wherein the second timing circuit includes a second counter for maintaining the system time, wherein contents of the first counter are loaded into the second counter in response to the signal indicative of the change from the active mode of operation of the digital processing circuit to the active mode of operation of the RF circuit.
15. The communication apparatus as recited in claim 14 , wherein contents of the second counter are loaded into the first counter in response to a signal indicative of a change from the active mode of operation of the RF circuit to the active mode of operation of the digital processing circuit.
16. The communication apparatus as recited in claim 14 , wherein the contents of the first counter are loaded into the second counter with no timing slip, and the contents of the second counter are loaded into the first counter with no timing slip.
17. The communication apparatus as recited in claim 14 , wherein the first timing circuit further includes a first instruction execution unit for executing instructions from a first instruction set, and wherein the second timing circuit further includes a second instruction execution unit for executing instructions from a second instruction set.
18. The communication apparatus as recited in claim 17 , wherein the first timing circuit is further configured to provide the timed signals controlling timing of system operations during the active mode of operation of the digital processing circuit in response to execution of instructions by the first instruction execution unit, and the second timing circuit is further configured to provide the timed signals controlling timing of system operations during the active mode of operation of the RF circuit in response to execution of instructions by the second instruction execution unit.
19. The communication apparatus as recited in claim 18 , wherein the first timing circuit further includes a first instruction store unit, and wherein the second timing circuit further includes a second instruction store unit.
20. The communication apparatus as recited in claim 19 , wherein the digital processing circuit further includes a microcontroller unit (MCU), wherein the MCU is configured to download instructions into the first instruction store unit for execution by the first instruction execution unit.
21. The communication apparatus as recited in claim 19 , wherein the first timing circuit is further configured to download instructions into the second instruction store unit for execution by the second execution unit.
22. The communication apparatus as described in claim 20 , wherein the first timing circuit is further configured to send an interrupt signal to the MCU indicative of a change from an active mode of the digital processing circuit to a shutdown mode of operation of the digital processing circuit.
23. The communication apparatus as described in claim 20 , wherein the digital processing circuit further includes a digital signal processor (DSP), and wherein the first timing circuit is further configured to send an interrupt signal to the DSP indicative of a change from an active mode of the digital processing circuit to a shutdown mode of operation of the digital processing circuit.
24. The communication apparatus as described in claim 22 , wherein the interrupt signal is generated in response to an execution of an instruction by the first instruction execution unit.
25. The communication apparatus as described in claim 23 , wherein the interrupt signal is generated in response to an execution of an instruction by the first instruction execution unit.
26. A method of operating a communication apparatus including a radio frequency (RF) circuit and a digital processing circuit, the method comprising:
providing timed signals from a first timing circuit controlling timing of system operations during an active mode of operation of the digital processing circuit;
receiving a signal at a second timing circuit indicative of a change from the active mode of operation of the digital processing circuit to an active mode of operation of the RF circuit;
synchronizing a transfer of control of the timing of system operations to the second timing circuit by transferring a time value from the first timing circuit to the second timing circuit; and
providing timed signals from the second timing circuit controlling timing of system operations during the active mode of operation of the RF circuit.
27. A method of operating a communication apparatus including a radio frequency (RF) circuit and a digital processing circuit, the method comprising:
providing timed signals from a first timing circuit controlling timing of system operations during an active mode of operation of the digital processing circuit;
receiving a first signal at a second timing circuit indicative of a change from the active mode of operation of the digital processing circuit to an active mode of operation of the RF circuit;
synchronizing a transfer of control of the timing of system operations to the second timing circuit by transferring a first time value from the first timing circuit to the second timing circuit;
disabling at least a portion of the first timing circuit;
providing timed signals from the second timing circuit controlling timing of system operations during the active mode of operation of the RF circuit;
enabling the portion of the first timing circuit;
receiving a second signal at the first timing circuit indicative of a change from the active mode of operation of the RF circuit to the active mode of operation of the digital processing circuit; and
resuming providing timed signals from the first timing circuit controlling timing of system operations in response to the second signal.
28. The method as recited in claim 27 , wherein the first signal is generated by the first timing circuit.
29. The method as recited in claim 28 , wherein the second signal is generated by the second timing circuit.
30. A communication apparatus comprising:
a radio frequency (RF) circuit configured to operate on a radio frequency signal, and
a digital processing circuit coupled to the RF circuit, wherein the digital processing circuit includes a first timing circuit and a second timing circuit;
wherein the first timing circuit is configured to provide timed signals controlling timing of system operations during a shutdown mode of operation of the RF circuit, and wherein the second timing circuit is configured to provide timed signals controlling timing of system operations during an active mode of operation of the RF circuit and wherein a time value is transferred from the first timing circuit to the second timing circuit to synchronize a transfer of control of the timing of system operations to the second timing circuit.
31. The communication apparatus as recited in claim 30 , wherein at least a portion of the first timing circuit is disabled during the active mode of operation of the RF circuit.
32. The communication apparatus as recited in claim 31 , wherein portions of the digital processing circuit in addition to the first timing circuit are disabled during the active mode of operation of the RF circuit.
33. The communication apparatus as recited in claim 32 , wherein the portions of the digital processing circuit are disabled in response to a signal generated by the second timing circuit.
34. The communication apparatus as recited in claim 31 , wherein the at least a portion of the first timing circuit is disabled in response to a signal generated by the second timing circuit.
35. The communication apparatus as recited in claim 31 , wherein the at least a portion of the first timing circuit is disabled by a signal that disables one or more clocks that clock the first timing circuit.
36. The communication apparatus as recited in claim 31 , wherein the at least a portion of the first timing circuit disabled during the active mode of operation of the RF circuit is enabled during the shutdown mode of operation of the RF circuit.
37. The communication apparatus as recited in claim 36 , wherein the at least a portion of the first timing circuit is enabled in response to a signal generated by the second timing circuit.
38. The communication apparatus as recited in claim 31 , wherein the second timing circuit is configured to provide the timed signals during the active mode of operation of the RF circuit in response to a signal indicative of a change from the shutdown mode of operation of the RF circuit to the active mode of operation of the RF circuit.
39. The communication apparatus as recited in claim 38 , wherein the signal indicative of the change from the shutdown mode of operation of the RF circuit to the active mode of operation of the RF circuit is provided by the first timing circuit.
40. A method of operating a communication apparatus including a radio frequency (RF) circuit and a digital processing circuit, the method comprising:
providing timed signals from a first timing circuit controlling timing of system operations during a shutdown mode of operation of the RF circuit;
receiving a signal at a second timing circuit indicative of a change from the shutdown mode of operation of the RF circuit to an active mode of operation of the RF circuit;
synchronizing a transfer of control of the timing of system operations to the second timing circuit by transferring a time value from the first timing circuit to the second timing circuit; and
providing timed signals from the second timing circuit controlling timing of system operations during the active mode of operation of the RF circuit.
41. A mobile phone comprising:
a radio frequency (RF) transceiver configured to operate on a radio frequency signal, and
a digital processing circuit coupled to the RF transceiver, wherein the digital processing circuit includes a first timing circuit and a second timing circuit;
wherein the first timing circuit is configured to provide timed signals controlling timing of system operations during an active mode of operation of the digital processing circuit, and wherein the second timing circuit is configured to provide timed signals controlling timing of system operations during an active mode of operation of the RF transceiver; and
wherein a time value is transferred from the first timing circuit to the second timing circuit to synchronize a transfer of control of the timing of system operations to the second timing circuit.
42. The mobile phone as recited in claim 41 , wherein at least a portion of the first timing circuit is disabled during the active mode of operation of the RF transceiver.
43. The mobile phone as recited in claim 42 , wherein portions of the digital processing circuit in addition to the first timing circuit are disabled during the active mode of operation of the RF transceiver.
44. The mobile phone as recited in claim 43 , wherein the portions of the digital processing circuit are disabled in response to a signal generated by the second timing circuit.
45. The mobile phone as recited in claim 42 , wherein the at least a portion of the first timing circuit is disabled in response to a signal generated by the second timing circuit.
46. The mobile phone as recited in claim 42 , wherein the at least a portion of the first timing circuit is disabled by a signal that disables one or more clocks that clock the first timing circuit.
47. The mobile phone as recited in claim 42 , wherein the at least a portion of the first timing circuit disabled during the active mode of operation of the RF transceiver is enabled during the active mode of operation of the digital processing circuit.
48. The mobile phone as recited in claim 47 , wherein the at least a portion of the first timing circuit is enabled in response to a signal generated by the second timing circuit.
49. The mobile phone as recited in claim 42 , wherein the second timing circuit is configured to provide the timed signals during the active mode of operation of the RF transceiver in response to a signal indicative of a change from the active mode of operation of the digital processing circuit to the active mode of operation of the RF transceiver.
50. The mobile phone as recited in claim 49 , wherein the signal indicative of the change from the active mode of operation of the digital processing circuit to the active mode of operation of the RF transceiver is provided by the first timing circuit.
51. A method of operating a mobile phone including a radio frequency (RF) transceiver and a digital processing circuit, the method comprising:
providing timed signals from a first timing circuit controlling timing of system operations during an active mode of operation of the digital processing circuit;
receiving a signal at a second timing circuit indicative of a change from the active mode of operation of the digital processing circuit to an active mode of operation of the RF transceiver;
synchronizing a transfer of control of the timing of system operations to the second timing circuit by transferring a time value from the first timing circuit to the second timing circuit; and
providing timed signals from the second timing circuit controlling timing of system operations during the active mode of operation of the RF transceiver.
52. A mobile phone comprising:
a radio frequency (RF) transceiver configured to operate on a radio frequency signal, and
a digital processing circuit coupled to the RF transceiver, wherein the digital processing circuit includes a first timing circuit and a second timing circuit;
wherein the first timing circuit is configured to provide timed signals controlling timing of system operations during a shutdown mode of operation of the RF transceiver;
wherein a time value is transferred from the first timing circuit to the second timing circuit to synchronize a transfer of control of the timing of system operations to the second timing circuit;
wherein the second timing circuit is configured to provide timed signals controlling timing of system operations during an active mode of operation of the RF transceiver; and
wherein the RF transceiver and the digital processing circuit are fabricated on a single integrated circuit chip.
53. The mobile phone as recited in claim 52 , wherein at least a portion of the first timing circuit is disabled during the active mode of operation of the RF transceiver.
54. The mobile phone as recited in claim 53 , wherein portions of the digital processing circuit in addition to the first timing circuit are disabled during the active mode of operation of the RF transceiver.
55. The mobile phone as recited in claim 54 , wherein the portions of the digital processing circuit are disabled in response to a signal generated by the second timing circuit.
56. The mobile phone as recited in claim 53 , wherein the at least a portion of the first timing circuit is disabled in response to a signal generated by the second timing circuit.
57. The mobile phone as recited in claim 53 , wherein the at least a portion of the first timing circuit is disabled by a signal that disables one or more clocks that clock the first timing circuit.
58. The mobile phone as recited in claim 53 , wherein the at least a portion of the first timing circuit disabled during the active mode of operation of the RF transceiver is enabled during the shutdown mode of operation of the RF transceiver.
59. The mobile phone as recited in claim 58 , wherein the at least a portion of the first timing circuit is enabled in response to a signal generated by the second timing circuit.
60. The mobile phone as recited in claim 53 , wherein the second timing circuit is configured to provide the timed signals during the active mode of operation of the RF transceiver in response to a signal indicative of a change from the shutdown mode of operation of the RF transceiver to the active mode of operation of the RF transceiver.
61. The mobile phone as recited in claim 60 , wherein the signal indicative of the change from the shutdown mode of operation of the RF transceiver to the active mode of operation of the RF transceiver is provided by the first timing circuit.