Micropower logarithmic analog to digital conversion system and method with offset and temperature compensation
View Patent ↗A logarithmic analog-to-digital converter system is disclosed. The system includes a transconductor for receiving an input signal and for producing a transconductor output signal at a transconductor output, a logarithmic circuit unit that is coupled to an input of the transconductor, a comparator amplifier for receiving the transconductor output signal and for producing a comparator amplifier output signal at a comparator amplifier output, and an integrating capacitor coupled to the transconductor output signal.
1. A logarithmic analog-to-digital converter system comprising:
a transconductor for receiving an input signal and for producing a transconductor output signal at a transconductor output;
a logarithmic circuit unit that contains a kT/q temperature variation that is cancelled by a q/kT variation of said transconductor;
a comparator amplifier coupled to the output of said transconductor via a coupling capacitor for receiving said transconductor output signal and for producing a comparator amplifier output signal at a comparator amplifier output; and
an integrating capacitor coupled to the transconductor output signal.
2. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said system further includes a de-integrating switch for selectively applying a de-integrating current to said transconductor output.
3. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said system further includes a first feedback loop coupling said transconductor output to an input of said transconductor, and a second feedback loop coupling said comparator amplifier output to an input of said comparator amplifier.
4. The logarithmic analog-to-digital converter system as claimed in claim 3 , wherein said first feedback loop includes a first auto-zero switch and said second feedback loop includes a second auto-zero switch.
5. The logarithmic analog-to-digital converter system as claimed in claim 1 wherein said transconductor provides auto-zeroing.
6. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said comparator amplifier provides auto-zeroing.
7. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said transconductor employs a well-input transistor arrangement.
8. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said logarithmic circuit unit provides temperature compensation.
9. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said logarithmic circuit unit is coupled to an input of said transconductor.
10. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said transconductor employs a gate-input transistor arrangement.
11. The logarithmic analog-to-digital converter system as claimed in claim 1 , wherein said system further includes a buffer amplifier coupled to said integrating capacitor.
12. A method of providing a logarithmic analog-to-digital conversion, said method comprising the steps of:
receiving a transconductor input signal and producing a transconductor output signal at a transconductor output;
coupling said transconductor output to an input of said transconductor;
receiving said transconductor output signal at a comparator amplifier input and producing a comparator amplifier output signal at a comparator amplifier output that is coupled to the transconductor output via a coupling capacitor;
coupling said comparator amplifier output to an input of said comparator amplifier;
integrating the transconductor input signal for a first period of time; and
de-integrating the transconductor output signal for a second period of time.
13. The method as claimed in claim 12 , wherein said first period of time is fixed and said second period of time provides information representative of a digital output of said system.
14. The method as claimed in claim 12 , wherein said method further includes the step of compensating for change in temperature of said system using a logarithmic circuit unit that is coupled to an input of the transconductor.
15. A logarithmic analog-to-digital converter system comprising:
a transconductor for receiving an input signal and for producing a transconductor output signal at a transconductor output;
a logarithmic circuit unit that is coupled to an input of said transconductor;
a first feedback loop coupling said transconductor output to an input of said transconductor;
a comparator amplifier coupled to the output of said transconductor via a coupling capacitor for receiving said transconductor output signal and for producing a comparator amplifier output signal at a comparator amplifier output;
a second feedback loop coupling said comparator amplifier output to an input of said comparator amplifier; and
an integrating capacitor coupled to the transconductor output signal.
16. The logarithmic analog-to-digital converter system as claimed in claim 15 , wherein said system further includes a de-integrating switch for selectively applying a de-integrating current to the transconductor output.
17. The logarithmic analog-to-digital converter system as claimed in claim 15 , wherein said first feedback loop includes a first auto-zero switch and said second feedback loop includes a second auto-zero switch.
18. The logarithmic analog-to-digital converter system as claimed in claim 15 , wherein said logarithmic circuit unit provides temperature compensation.
19. The logarithmic analog-to-digital converter system as claimed in claim 15 , wherein said logarithmic circuit unit is directly connected to an input of said transconductor.
20. The logarithmic analog-to-digital converter system as claimed in claim 19 , wherein said logarithmic circuit unit contains a kT/q temperature variation that is cancelled by the q/kT variation of said transconductor.
21. A logarithmic analog-to-digital converter system comprising:
a transconductor for receiving an input signal and for producing a transconductor output signal at a transconductor output;
a first feedback loop coupling said transconductor output to an input of said transconductor;
a comparator amplifier coupled to the output of said transconductor via a coupling capacitor for receiving said transconductor output signal and for producing a comparator amplifier output signal at a comparator amplifier output;
a second feedback loop coupling said comparator amplifier output to an input of said comparator amplifier; and
an integrating capacitor coupled to the transconductor output signal.
22. The logarithmic analog-to-digital converter system as claimed in claim 21 , wherein said first feedback loop includes a first auto-zeroing switch.
23. The logarithmic analog-to-digital converter system as claimed in claim 21 , wherein said system further includes a de-integrating switch for selectively applying a de-integrating current to the transconductor output.
24. The logarithmic analog-to-digital converter system as claimed in claim 21 , wherein said system further includes a logarithmic circuit unit.
25. The logarithmic analog-to-digital converter system as claimed in claim 24 , wherein said logarithmic circuit unit provides temperature compensation.
26. The logarithmic analog-to-digital converter system as claimed in claim 21 , wherein said logarithmic circuit unit is coupled to an input of said transconductor.
27. The logarithmic analog-to-digital converter system as claimed in claim 26 , wherein said logarithmic circuit unit contains a kT/q temperature variation that is cancelled by the q/kT variation of said transconductor.
28. The logarithmic analog-to-digital converter system as claimed in claim 21 , wherein said second feedback loop includes a second auto-zeroing switch.