Bipolar transistor with nonselective epitaxial base and raised extrinsic base
A method for forming a transistor that includes forming an intrinsic base on a substrate using nonselective epitaxy and forming a raised extrinsic base on the intrinsic base. The nonselective epitaxy used to form the intrinsic base avoids the costly, complex, and defect prone process of selective epitaxy while the raised extrinsic base avoids the high resistance, high noise, low gain, and base contact problems found in prior transistors having thin base regions.
1 . A method for forming a transistor, comprising:
forming an intrinsic base on a substrate using nonselective epitaxy;
forming a raised extrinsic base on the intrinsic base.
2 . The method of claim 1 , wherein forming an intrinsic base comprises forming a silicon-germanium layer on the substrate.
3 . The method of claim 1 , wherein forming a raised extrinsic base comprises depositing a polysilicon material using nonselective epitaxy.
4 . The method of claim 3 , further comprising:
forming an etch stop on the intrinsic base;
patterning the etch stop.
5 . The method of claim 4 , wherein forming the raised extrinsic base using nonselective epitaxy comprises forming the raised extrinsic base on the etch stop and the intrinsic base.
6 . The method of claim 5 , further comprising forming a dielectric on the raised extrinsic base.
7 . The method of claim 6 , further comprising:
etching an opening in the dielectric and the raised extrinsic base down to the etch stop;
forming an emitter in the opening.
8 . The method of claim 7 , wherein forming an emitter comprises:
forming a set of spacers in the opening;
depositing a polysilicon material into the opening.
9 . The method of claim 1 , further comprising forming a base contact onto the raised extrinsic base.
10 . A transistor, comprising:
intrinsic base formed on a substrate using nonselective epitaxy;
raised extrinsic base on the intrinsic base.
11 . The transistor of claim 10 , wherein the intrinsic base comprises a silicon-germanium layer.
12 . The transistor of claim 10 , wherein the raised extrinsic base comprises a polysilicon material.
13 . The transistor of claim 12 , wherein the polysilicon material is deposited using nonselective epitaxy.
14 . The transistor of claim 10 , wherein the raised extrinsic base is formed on an etch stop on the intrinsic base.
15 . The transistor of claim 14 , further comprising a dielectric on the raised extrinsic base.
16 . The transistor of claim 15 , further comprising an emitter formed in an opening in the dielectric and the raised extrinsic base.
17 . The transistor of claim 16 , wherein the emitter comprises a polysilicon material deposited into the opening.
18 . The transistor of claim 10 , further comprising a base contact on the raised extrinsic base.