IP Library Granted Patent US 7,657,983
Granted Patent B2
US 7,657,983 · App. 10/888,429 · Granted Feb 9, 2010

Method of producing a topology-optimized electrode for a resonator in thin-film technology

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,657,983
App. No.
10/888,429
Granted
Feb 9, 2010
Kind
B2
Abstract

In a method of producing an electrode for a resonator in thin-film technology, the electrode of the resonator is embedded in an insulating layer such that a surface of the electrode is exposed, and that a surface defined by the electrode and the insulating layer is substantially planar.

Claims (30)

1. A method of producing a resonator in thin-film technology, the resonator including a piezoelectric layer which is arranged at least partially between a lower electrode and an upper electrode, the resonator being formed on a substrate, the method comprising:

(a) producing the lower electrode of the resonator on the substrate;

(b) depositing an insulating layer on the surface of the substrate, with a thickness substantially equal to the thickness of the lower electrode;

(c) lifting off a portion of the insulating layer such that a surface of the lower electrode is exposed, and that a substantially planar surface defined by the lower electrode and a portion of insulating layer remaining is formed;

(d) depositing the piezoelectric layer on and in contact with the substantially planar surface; and

(e) producing the upper electrode on the piezoelectric layer.

2. The method as claimed in claim 1 , wherein the lifting off comprises lifting off the insulating layer such that a portion of the insulating layer outside of the lower electrode remains substantially unchanged.

3. The method as claimed in claim 2 , wherein the lifting off comprises the removal of the insulating layer above the lower electrode by chemical-mechanical polishing.

4. The method as claimed in claim 1 , wherein the lifting off comprises: etching a part of the insulating layer above the lower electrode using a mask, such that a portion of the upper surface of the lower electrode is exposed; and removing, using chemical-mechanical polishing, remaining portions of the insulating layer that are located above a plane defined by the surface of the lower electrode.

5. The method as claimed in claim 1 , wherein the insulating layer comprises a dielectric layer.

6. The method as claimed in claim 5 , wherein the dielectric layer comprises one of the group consisting of a silicon nitride layer and a silicon oxide layer.

7. The method as claimed in claim 1 , wherein the piezoelectric layer comprises one of the group consisting of AlN, ZnO and PZT.

8. The method as claimed in claim 1 , wherein the lower electrode and the upper electrode comprise at least one of the group consisting of aluminum and tungsten.

9. The method as claimed in claim 1 , wherein the resonator is a BAW resonator.

10. A method of producing a resonator in thin-film technology, the resonator including a piezoelectric layer which is arranged at least partially between a first electrode and a second electrode, the resonator being formed on a substrate, the method comprising:

(a) providing the first electrode of the resonator on the substrate;

(b) forming an insulating layer on the surface of the substrate, the insulating layer having a thickness at least as great as a thickness of the first electrode;

(c) removing a portion of the insulating layer such that a surface of the first electrode is exposed, and that a substantially planar surface defined by the first electrode and the insulating layer is formed;

(d) depositing the piezoelectric layer on and in contact with the substantially planar surface; and

(e) producing the second electrode on the piezoelectric layer.

11. The method as claimed in claim 10 , wherein the forming the insulating layer comprises depositing the insulating layer.

12. The method as claimed in claim 10 , wherein the removing comprises removing the insulating layer such that a portion of the insulating layer outside of the first electrode remains substantially unchanged.

13. The method as claimed in claim 12 , wherein the removing comprises the removal of the insulating layer above the electrode by chemical-mechanical polishing.

14. The method as claimed in claim 10 , wherein removing comprises: etching a part of the insulating layer above the first electrode using a mask, such that a portion of the upper surface of the first electrode is exposed; and removing, using chemical-mechanical polishing, remaining portions of the insulating layer that are located above a plane defined by the surface of the first electrode.

15. The method as claimed in claim 10 , wherein the insulating layer comprises a dielectric layer.

16. The method as claimed in claim 15 , wherein the dielectric layer comprises one of the group consisting of a silicon nitride layer and a silicon oxide layer.

17. The method as claimed in claim 16 , wherein the piezoelectric layer comprises one of the group consisting of AlN, ZnO and PZT.

18. The method as claimed in claim 10 , wherein the first electrode and the second electrode comprise at least one of the group consisting of aluminum and tungsten.

19. The method as claimed in claim 10 , wherein the resonator is a BAW resonator.

20. The method as claimed in claim 10 , wherein the piezoelectric layer comprises one of the group consisting of AlN, ZnO and PZT.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0703 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2008
From: INFINEON TECHNOLOGIES AG
To: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
Reel/Frame 021580/0564 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2004
From: AIGNER, ROBERT; ELBRECHT, LUDER; MARKSTEINER, STEPHAN; NESSLER, WINFRIED
To: INFINEON TECHNOLOGIE AG
Reel/Frame 016011/0380 →