Thin film transistor with multiple gates using metal induced lateral crystalization and method of fabricating the same
View Patent ↗A thin film transistor with multiple gates using an MILC process which is capable of materializing multiple gates without increasing dimensions and a method thereof. The thin film transistor has a semiconductor layer which is formed on a insulating substrate in a zigzag shape; and a gate electrode which is equipped with one or more slots intersecting with the semiconductor layer, the semiconductor layer includes two or more body parts intersecting with the gate electrode; and one or more connection parts connecting each neighboring body part, wherein a part overlapping the semiconductor layer in the gate electrode acts as a multiple gate, and MILC surfaces are formed at a part which does not intersect with the gate electrode in the semiconductor layer.
1. A method of fabricating a thin film transistor with multiple gates using an MILC process comprising:
forming an amorphous silicon film in a zigzag shape on an insulating substrate;
forming a gate insulating film on the front surface of the insulating substrate;
forming a gate electrode on the gate insulating film so that the gate electrode intersects with the amorphous silicon film;
forming over the front surface of the insulating substrate an interlayer insulating film equipped with contact holes exposing edges of both sides of the amorphous silicon film;
forming a metal layer contacting an exposed part of the amorphous silicon film through the contact holes;
forming a semiconductor layer comprising a polycrystalline silicon film by crystallizing the amorphous silicon film using the MILC process; and
forming source/drain electrodes contacting the semiconductor layers through the contact holes.
2. The method according to claim 1 , wherein the source/drain electrodes are formed by patterning deposited source/drain electrode materials after removing the metal film and depositing the source/drain electrode materials.
3. The method according to claim 1 , wherein the source/drain electrodes are formed in a second layered structure by sequentially patterning source/drain electrode materials and metal film after depositing the source/drain electrode materials on the metal film.
4. The method according to claim 1 , wherein the metal layer forms a metal silicide on the front surface of the silicon film at a thickness of several hundreds of angstroms.