IP Library Granted Patent US 7,825,973
Granted Patent B2
US 7,825,973 · App. 10/892,318 · Granted Nov 2, 2010

Exposure control for image sensors

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,825,973
App. No.
10/892,318
Granted
Nov 2, 2010
Kind
B2
Abstract

An imaging system utilizes an exposure control circuit to control the length of an exposure in full frame mode. The exposure control circuit receives as an input the antiblooming current from at least a representative sample of pixels and determines when to end an exposure based on the amount of current received.

Claims (59)

1. A pixel for an imaging system, comprising:

a photosensor, said photosensor for converting incident light into a current, and having a photosensor output for said current;

a plurality of transistors, coupled to said photosensor output, for controllably resetting and transferring said current to a pixel output node; and

an antiblooming transistor arranged to gate an antiblooming current from the photosensor output to an antiblooming node, said antiblooming node arranged to provide said antiblooming current to an exposure control circuit arranged to control exposure of light to the photosensor.

2. The pixel of claim 1 , wherein said plurality of transistors comprises a reset transistor having a source/drain coupled to said photosensor output and another source/drain coupled to a voltage source.

3. The pixel of claim 1 , wherein said plurality of transistors comprises a transfer transistor coupled in series between said photosensor output and said remainder of the plurality of transistors.

4. A pixel array, comprising:

a plurality of pixels, said plurality of pixels being arranged in a N-by-M array, where N and M are each positive integers, each of said plurality of pixels comprising:

a photosensor, said photosensor for converting incident light into a current, and having an output for said current,

a plurality of transistors, coupled to said output, for controllably resetting and transferring said current to a output node, and

an antiblooming transistor arranged to gate an antiblooming current from said output of said photosensor to an antiblooming node; and

an aggregated antibloom current line arranged to aggregate the antiblooming current received from each of the plurality of pixels, said aggregated antibloom current line coupling a plurality of antiblooming nodes of said plurality of pixels to an exposure control circuit arranged to control exposure of light to the photosensor.

5. The pixel array of claim 4 , wherein said aggregated antibloom current line is coupled to the antiblooming nodes of every pixel in said plurality of pixels.

6. The pixel array of claim 4 , wherein said aggregated antibloom current line is coupled to the antiblooming nodes of a representative sample of said plurality of pixels.

7. The pixel array of claim 4 , wherein said aggregated antibloom current line is adapted to be coupled to a control circuit.

8. The pixel array of claim 7 , wherein said control circuit is adapted to control an exposure time for said pixel array.

9. The pixel array of claim 4 , wherein the plurality of transistors in each of said plurality of pixels comprises a reset transistor having a source/drain coupled to said output and another source/drain coupled to a voltage source.

10. The pixel array of claim 4 , wherein the plurality of transistors in each of said plurality of pixels comprises a transfer transistor coupled in series between said output and said remainder of the plurality of transistors.

11. An exposure control circuit for an imaging system, comprising:

an input line for receiving an input current;

an input node for receiving a exposure start control signal;

an output node producing an exposure stop control signal;

a current mirror for mirroring said input current as a control current to said output node; and

a control transistor, having a gate coupled to said input node, a first terminal coupled to said output node, and second terminal coupled to the output node and a ground potential.

12. The exposure control circuit of claim 11 , further comprising a capacitor, wherein said capacitor is coupled to said output node and said capacitor is coupled between the first and second terminals of said control transistor.

13. The exposure control circuit of claim 11 , further comprising a second control transistor, said second control transistor having a first terminal coupled to a same potential source which powers said current mirror, a second terminal coupled to said input line, and a gate for receiving a control signal to controllably couple said input line to said same potential source.

14. The exposure control circuit of claim 11 , wherein said input line is coupled to the antiblooming nodes of a plurality of pixels.

15. The exposure control circuit of claim 14 , wherein said plurality of pixels comprises every pixel of a pixel array.

16. The exposure control circuit of claim 14 , wherein said plurality of pixels comprises a representative sample of pixels of a pixel array.

17. An imaging system, comprising:

a pixel array, said pixel array comprising:

a plurality of pixels, said plurality of pixels being arranged in a N-by-M array where N and M are each positive integers, each of said plurality of pixels comprising:

a photosensor, said photosensor for converting incident light into a current, and having an output for said current,

a plurality of transistors, coupled to said output, for controllably resetting and transferring said current to a output node, and

an antiblooming transistor, coupled to said output of said photosensor, and for gating an antiblooming current to an antiblooming node; and

a aggregated antibloom current line, said aggregated antibloom current line coupled to a plurality of antiblooming nodes of said plurality of pixels;

control circuitry for generating an exposure start control signal;

an exposure control circuit, said exposure control circuit comprising:

an input line coupled to said aggregated antibloom current line;

an input node for receiving said exposure start control signal from said control circuitry;

an output node producing an exposure stop control signal;

a current mirror for mirroring said input current as a control current to said output node; and

a control transistor, having a gate coupled to said input node, a terminal coupled to said output node and a first plate of said capacitor, and second terminal coupled a second plate of said capacitor and to a ground; and

an exposure control mechanism for receiving said exposure start control signal, said exposure stop control signal, and for controllably exposing said pixel array to incident light based upon the states of said exposure start and said exposure stop signals.

18. The imaging system of claim 17 , wherein said exposure control mechanism is a mechanical shutter.

19. The imaging system of claim 17 , wherein said exposure control mechanism is a controllable light source.

20. The imaging system of claim 17 , wherein said aggregated antibloom current line is coupled to the antiblooming nodes of every pixel in said plurality of pixels.

21. The imaging system of claim 17 , wherein said aggregated antibloom current line is coupled to the antiblooming nodes of a representative sample of said plurality of pixels.

22. A method for operating a pixel, comprising:

changing a potential at a node by conducting charge to said node based on an amount of incident light during an integration period; and

if the potential changes beyond a predetermined threshold, maintaining said node at said predetermined threshold by transferring said charge to an exposure control circuit arranged to control exposure of light to the pixel.

23. A method for operating a pixel array, comprising:

at each one of a plurality of pixels of said pixel array, changing a potential at a node by conducting charge to said node based on an amount of incident light during an integration period;

if the potential changes beyond a predetermined threshold, maintaining said node at said predetermined threshold by conducting said charge to an antiblooming node;

transferring said charge from said antiblooming node to an aggregate line; and

measuring charge from said aggregate line to determine an exposure period.

24. The method of claim 23 , wherein said aggregate line is coupled to every pixel of said pixel array.

25. The method of claim 23 , wherein said aggregate line is coupled to a representative sample of said plurality of pixels.

26. The method of claim 23 , wherein said aggregate line is coupled to a control circuit of an imaging system.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2004
From: BOEMLER, CHRISTIAN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 015585/0023 →