IP Library Granted Patent US 7,310,768
Granted Patent B2
US 7,310,768 · App. 10/892,738 · Granted Dec 18, 2007

Iterative decoder employing multiple external code error checks to lower the error floor

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Quick Facts
Patent No.
US 7,310,768
App. No.
10/892,738
Granted
Dec 18, 2007
Kind
B2
Abstract

Iterative decoder employing multiple external code error checks to lower the error floor and/or improve decoding performance. Data block redundancy, sometimes via a cyclic redundancy check (CRC) or Reed Solomon (RS) code, enables enhanced iterative decoding performance. Improved decoding performance is achieved during interim iterations before the final iteration. A correctly decoded CRC block, indicating a decoded segment is correct with a high degree of certainty, assigns a very high confidence level to the bits in this segment and is fed back to inner and/or outer decoders (with interleaving, when appropriate) for improved iterative decoding. High confidence bits may be scattered throughout inner decoded frames to influence other bit decisions in subsequent iterations. Turbo decoders typically operate relatively well at regions where the BER is high; the invention improves iterative decoder operation at lower BERs, lowering the ‘BER floor’ that is sometimes problematic with conventional turbo decoders.

Claims (41)

1. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and the external code decoder performs decoding on a sub-block basis.

2. The iterative decoder of claim 1 , wherein the external code decoder performs error detection processing on one of the sub-blocks within the plurality of sub-blocks.

3. The iterative decoder of claim 2 , wherein the external code decoder performs error correction processing on the one of the sub-blocks within the plurality of sub-blocks.

4. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein the data block comprises a turbo code data block;

the external code decoder further comprises an external code interleaver and an external code deinterleaver; and

each of the external code interleaver and the external code deinterleaver is operable to process a plurality of data having a span that is as long as a span of the turbo code data block.

5. An iterative decoder method, comprising:

performing iterative internal decoding of a data block; and

feeding back external decoding information to influence selective decisions during subsequent internal decoding iterations of the data block;

wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and further comprising performing decoding on a sub-block basis; and performing error detection processing on one of the sub-blocks within the plurality of sub-blocks.

6. An iterative decoder method, comprising:

performing iterative internal decoding of a data block; and

feeding back external decoding information to influence selective decisions during subsequent internal decoding iterations of the data block, wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and further comprising performing decoding on a sub-block basis; and performing error detection processing on one of the sub-blocks within the plurality of sub-blocks.

7. An iterative decoder, comprising:

means for performing iterative decoding of a data block; and

means for supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks; and the means for performing external code decoding performs decoding on a sub-block basis.

8. The iterative decoder of claim 7 , wherein the means for performing external code decoding performs error detection processing on one of the sub-blocks within the plurality of sub-blocks.

9. The iterative decoder of claim 8 , wherein the means for performing external code decoding performs error correction processing on the one of the sub-blocks within the plurality of sub-blocks.

10. An iterative decoder, comprising:

means for performing iterative decoding of a data block; and

means for supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block, wherein

the data block comprises a turbo code data block;

the means for performing external code decoding further comprises means for performing external code interleaving and means for performing external code deinterleaving; and

each of the means for performing external code interleaving and the means for performing external code deinterleaving is operable to process a plurality of data having a span that is as long as a span of the turbo code data block.

11. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block;

wherein the data block comprises a turbo code data block comprising a plurality of sub-blocks;

the external code decoder performs decoding on a sub-block basis;

the external code decoder performs error detection processing on one of the sub-blocks within the plurality of sub-blocks; and

the external code decoder performs error correction processing on the one of the sub-blocks within the plurality of sub-blocks.

12. An iterative decoder, comprising:

an internal code decoder operable to perform iterative decoding of a data block; and

an external code decoder capable of supplying a feedback signal to the internal decoder wherein the feedback signal is used to influence selective decisions during subsequent decoding iterations of the data block;

wherein the data block comprises a turbo code data block;

the external code decoder further comprises an external code interleaver and an external code deinterleaver; and

each of the external code interleaver and the external code deinterleaver is operable to process a plurality of data having a span that is as long as a span of the turbo code data block.

Assignments (12)
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
MERGER AND CHANGE OF NAME Recorded May 19, 2015
From: ENTROPIC COMMUNICATIONS, INC.; EXCALIBUR SUBSIDIARY, LLC; ENTROPIC COMMUNICATIONS, LLC
To: ENTROPIC COMMUNICATIONS, LLC
Reel/Frame 035717/0628 →
MERGER AND CHANGE OF NAME Recorded May 18, 2015
From: EXCALIBUR ACQUISITION CORPORATION; ENTROPIC COMMUNICATIONS, INC.; ENTROPIC COMMUNICATIONS, INC.
To: ENTROPIC COMMUNICATIONS, INC.
Reel/Frame 035706/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2012
From: TRIDENT MICROSYSTEMS, INC.; TRIDENT MICROSYSTEMS (FAR EAST) LTD.
To: ENTROPIC COMMUNICATIONS, INC.
Reel/Frame 028146/0178 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2010
From: NXP
To: NXP HOLDING 1 B.V.
Reel/Frame 023928/0489 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2010
From: TRIDENT MICROSYSTEMS (EUROPE) B.V.; NXP HOLDING 1 B.V.
To: TRIDENT MICROSYSTEMS (FAR EAST) LTD.
Reel/Frame 023928/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2008
From: CONEXANT SYSTEMS, INC.
To: NXP, B.V.
Reel/Frame 021531/0523 →
RELEASE OF SECURITY INTEREST Recorded Sep 15, 2008
From: BANK OF NEW YORK MELLON TRUST COMPANY, N.A. (FORMERLY, BANK OF NEW YORK TRUST COMPANY, N.A.)
To: CONEXANT SYSTEMS, INC.
Reel/Frame 021523/0804 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2007
From: EIDSON, DONALD BRIAN; KRIEGER, ABRAHAM; MURALI, RAMASWAMY
To: CONEXANT SYSTEMS, INC.
Reel/Frame 018871/0672 →
SECURITY AGREEMENT Recorded Nov 22, 2006
From: CONEXANT SYSTEMS, INC.
To: BANK OF NEW YORK TRUST COMPANY, N.A.
Reel/Frame 018711/0818 →