Amplifier arrangement and control loop having the amplifier arrangement
View Patent ↗An amplifier arrangement and also a control loop having the amplifier arrangement are specified, wherein the amplifier arrangement is based on a Gilbert multiplier. Connected in parallel in this case with one of the transistors of the differential amplifier cells is an additional transistor, at which it is possible to tap off a signal that is proportional to the gain factor. Processing this signal in a suitable manner, for example in a control loop, makes it possible to compensate for temperature and manufacturing fluctuations and also to obtain a highly linear characteristic curve having a gain factor which can be set in a stable manner. In addition, the structure shown is current-saving and can be used, in particular, for application in radio frequency technology as an amplifier having a variable gain factor (VGA).
1. An amplifier arrangement, comprising:
a Gilbert multiplier circuit comprising first and second inputs, wherein the first input is configured to receive a signal to set a gain of the arrangement, and the second input is configured to receive a radio frequency signal input for amplification thereof, and wherein the Gilbert multiplier circuit further comprises an output for outputting an amplified radio frequency signal;
an additional transistor comprising a control terminal and a load terminal connected to a control terminal and a load terminal, respectively, of a transistor of the multiplier circuit, the additional transistor also comprising a further load terminal that forms an additional output of the amplifier arrangement configured to provide a signal representing a gain of the amplifier arrangement.
2. The amplifier arrangement as claimed in claim 1 , wherein the Gilbert multiplier circuit comprises first and second differential amplifiers, each having two transistors comprising control terminals, wherein the control terminals are connected to the first input for setting the gain, and wherein the Gilbert multiplier circuit further comprises a third differential amplifier comprising two respective transistors comprising control terminals, wherein the control terminals of the third differential amplifier transistors form the radio frequency signal input of the amplifier arrangement, and comprising further additional transistors coupled to each of the transistors of the first and second differential amplifiers.
3. The amplifier arrangement as claimed in claim 2 , wherein the additional transistor and the further additional transistors have smaller dimensions than the transistors of the first and the second differential amplifier.
4. The amplifier arrangement as claimed in claim 2 , wherein one load terminal of each of the further additional transistors is coupled to a supply potential terminal.
5. The amplifier arrangement as claimed in claim 2 , wherein one load terminal of each of the transistors of the first and second differential amplifiers is coupled to a supply potential terminal via a symmetrical electrical load, at which the output of the amplifier arrangement is formed.
6. The amplifier arrangement as claimed in claim 5 , wherein the electrical load comprises an impedance.
7. The amplifier arrangement as claimed in claim 1 , wherein the amplifier arrangement is constructed using bipolar circuit technology.
8. A amplifier arrangement of claim 1 , in combination with a regulating amplifier, wherein the additional output of the amplifier arrangement is coupled to an input of the regulating amplifier and an output of the regulating amplifier is coupled to the first input of the amplifier arrangement for setting the gain thereof, wherein the regulating amplifier is configured to compare a signal at the additional output of the amplifier arrangement that is a function of the gain, to a reference variable, and provide an output signal at its output in response thereto, wherein the output signal regulates the gain of the amplifier arrangement.
9. An amplifier circuit, comprising:
a Gilbert multiplier circuit; and
a gain indication circuit connected to the Gilbert multiplier circuit, the gain indication circuit operable to generate a signal indicative of a gain of the Gilbert multiplier circuit, wherein the gain indication circuit comprises a transistor comprising a control terminal connected to a control terminal of a transistor of the multiplier circuit, the gain indication circuit transistor also comprising a load terminal that forms an additional output of the amplifier arrangement configured to provide a signal representing a gain of the amplifier circuit.
10. A loop circuit, comprising:
a Gilbert multiplier circuit;
a gain indication circuit connected to the Gilbert multiplier circuit, the gain indication circuit comprising a transistor and operable to generate a signal indicative of a gain of the Gilbert multiplier circuit; and
a regulating amplifier,
wherein the regulating amplifier comprises an output coupled to a gain adjustment input of the Gilbert multiplier circuit, and comprises an input coupled to an output of the gain indication circuit,
wherein the regulating amplifier is operable to receive the signal indicative of the gain of the Gilbert multiplier circuit from the gain indication circuit and provide a control signal in response thereto to the gain adjustment input of the Gilbert multiplier circuit, thereby effectuating a substantially linear gain characteristic in the Gilbert multiplier circuit over a predetermined range.