IP Library Granted Patent US 6,972,232
Granted Patent B2
US 6,972,232 · App. 10/902,353 · Granted Dec 6, 2005

Method of manufacturing a semiconductor device

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Quick Facts
Patent No.
US 6,972,232
App. No.
10/902,353
Granted
Dec 6, 2005
Kind
B2
Abstract

There is provided a method of manufacturing a high quality P-channel trench MOSFET which stably operates. In the method of manufacturing a P-channel trench MOSFET having a P-type gate electrode, the process in which BF 2 ions are implanted into a polycrystalline silicon film and thereafter the heat treatment is carried out is performed plural times to thereby form the gate electrode, and it is possible to provide the P-channel trench MOSFET of high quality which stably operates.

Claims (12)

1. A method of manufacturing a P-channel MOSFET, comprising:

forming a trench within an N-type semiconductor substrate;

forming a gate oxide film on an inner surface of the trench;

depositing a first polycrystalline silicon film on the semiconductor substrate;

implanting BF 2 ions into the first polycrystalline silicon film by utilizing an ion implantation method and carrying out a first heat treatment;

depositing a second polycrystalline silicon film on the heated first polycrystalline silicon film;

implanting BF 2 ions into the second polycrystalline silicon film by utilizing the ion implantation method and carrying out a second heat treatment;

depositing a third polycrystalline silicon on the second polycrystalline silicon film; and

implanting BF 2 ions into the third polycrystalline silicon film by utilizing the ion implantation method and carrying out a third heat treatment.

2. A method of manufacturing a P-channel MOSFET according to claim 1 , wherein a thickness of each of the first, second, and third polycrystalline silicon films is in a range of 300 to 400 nm.

3. A method of manufacturing a P-channel MOSFET according to claim 1 , wherein a dose of the BF 2 ions implanted into each of the first, second, and third polycrystalline silicon films is in a range of 1×10 15 to 7×10 15 cm −2 .

4. A method of manufacturing a P-channel MOSFET according to claim 1 , wherein each of the first, second, and third heat treatments is carried out at a temperature of 800 to 900 C.

Assignments (4)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: SEIKO INSTRUMENTS INC.
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 038058/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2005
From: OSANAI, JUN
To: SEIKO INSTRUMENTS INC.
Reel/Frame 017085/0172 →