IP Library Granted Patent US 7,282,800
Granted Patent B2
US 7,282,800 · App. 10/902,467 · Granted Oct 16, 2007

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 7,282,800
App. No.
10/902,467
Granted
Oct 16, 2007
Kind
B2
Abstract

The present invention provides a semiconductor device capable of improving productivity while maintaining electrical characteristics, and a manufacturing method thereof. One characteristic point of the present invention is that a plating processing condition (A) for forming a metal wiring layer (redistribution wiring) corresponding to a first conductive layer and a plating processing condition (B) for forming a post electrode corresponding to a second conductive layer are made different from each other.

Claims (29)

1. A semiconductor device, comprising:

a semiconductor substrate having a main surface with circuit elements formed thereon;

electrode pads formed on the main surface and respectively electrically connected to the circuit elements;

an insulating film which has openings each exposing part of the surface of each of the electrode pads and covers the main surface;

first conductive patterns each extending from the surface of the electrode pad to the surface of the insulating film and formed by a first plating process set to a first condition;

second conductive patterns each electrically connected to a respective first conductive pattern, each having a surface ground together with an encapsulating resin and formed by a second plating process set to a second condition different from the first condition;

the encapsulating resin which has a surface ground together with the second conductive patterns and covers the first conductive patterns and the insulating film; and

external terminals each formed on the surface of the respective second conductive patterns.

2. A semiconductor device according to claim 1 , wherein the first conductive pattern is a redistribution wiring of a wafer level chip size package.

3. A semiconductor device according to claim 1 , wherein the second conductive pattern is a protruded electrode having a top surface and a bottom surface, the top surface being ground with the encapsulating resin and the bottom surface being contacted to the first conductive pattern.

4. A semiconductor device according to claim 1 , wherein the respective surfaces of the second conductive patterns are flush with and in a same plane as, an upper surface of the encapsulating resin.

5. A semiconductor device according to claim 1 , further comprising an insulating layer disposed over said semiconductor substrate and under said electrode pads.

6. A semiconductor device according to claim 5 , further comprising a passivation film disposed over said insulating layer and under said insulating film.

7. A semiconductor device according to claim 1 , further comprising a passivation film disposed over said semiconductor substrate and under said insulating film.

8. A semiconductor device according to claim 1 , further comprising metal thin films, each being disposed between a respective electrode pad and a respective first conductive pattern.

9. A semiconductor device, comprising:

a semiconductor substrate having a main surface with a circuit element formed thereon;

at least one electrode pad formed on the main surface and being electrically connected to the circuit element;

an insulating film having an opening that exposes part of a surface of the electrode pad, and which covers the main surface;

at least one first conductive pattern extending from above the surface of the electrode pad to above the surface of the insulating film;

an encapsulating resin which covers the first conductive pattern and the insulating film;

at least one second conductive pattern electrically connected to the first conductive pattern, and having a top surface that is flush with and in a same plane as, a surface of the encapsulating resin; and

at least one external terminal formed on the surface of the second conductive pattern.

10. A semiconductor device according to claim 9 , wherein the second conductive pattern is a protruded electrode having the top surface and a bottom surface, the top surface being ground with the encapsulating resin and the bottom surface contacting the first conductive pattern.

11. A semiconductor device according to claim 9 , wherein the first conductive pattern is a redistribution wiring of a wafer level chip size package.

12. A semiconductor device according to claim 9 , further comprising an insulating layer disposed over said semiconductor substrate and under said electrode pad.

13. A semiconductor device according to claim 12 , further comprising a passivation film disposed over said insulating layer and under said insulating film.

14. A semiconductor device according to claim 9 , further comprising a passivation film disposed over said semiconductor substrate and under said insulating film.

15. A semiconductor device according to claim 9 , further comprising a metal thin film disposed between said electrode pad and said first conductive pattern.

Assignments (2)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Dec 24, 2008
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022052/0797 →