IP Library Granted Patent US 7,564,882
Granted Patent B2
US 7,564,882 · App. 10/903,179 · Granted Jul 21, 2009

Integrated circuit having on-chip laser burn-in circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,564,882
App. No.
10/903,179
Granted
Jul 21, 2009
Kind
B2
Abstract

An integrated circuit for providing burn-in current to a laser diode. The integrated circuit includes a laser driver having an output for connection to the laser diode. Burn-in circuitry is formed on the integrated circuit and generates a burn-in current. A switch is formed on the integrated circuit and couples the burn-in current to the laser diode in response to an enable signal.

Claims (31)

1. An integrated circuit for providing burn-in current to a laser diode, the integrated circuit comprising:

a laser driver having an output for connection to the laser diode;

burn-in circuitry formed on said integrated circuit, said burn-in circuitry configured for generating a burn-in current;

a first switch formed on said integrated circuit, said first switch operative to couple said burn-in current directly to the laser diode in response to a first enable signal provided to said integrated circuit and further operative to directly decouple said burn-in circuit from the laser diode in response to a second enable signal provided to said integrated circuit; and

a second switch formed on said integrated circuit, said second switch operative to enable said burn-in circuit for generation of said burn-in current in response to said first enable signal, and further operative to disable said burn-in circuit for disabling generation of said burn-in current in response to said second enable signal.

2. The integrated circuit of claim 1 further comprising an input buffer receiving a signal from a communications device.

3. The integrated circuit of claim 2 further comprising a limiting amplifier for amplifying an output signal from said input buffer and providing an amplified signal to said laser driver.

4. The integrated circuit of claim 1 wherein said burn-in circuitry includes an amplifier for supplying a current from a current source to generate said burn-in current.

5. The integrated circuit of claim 4 wherein said amplifier is a current mirror.

6. The integrated circuit of claim 5 , wherein said current mirror comprises a FET and the second switch is coupled to a gate terminal of the FET, the second switch operative to bias the gate terminal for turning on the FET when the first enable signal is provided to the integrated circuit.

7. The integrated circuit of claim 6 , wherein the second switch is further operative to bias the gate terminal for turning off the FET when the second enable signal is provided to the integrated circuit.

8. The integrated circuit of claim 1 wherein said burn-in circuitry includes a current buffer for supplying a current from a current source to generate said burn-in current.

9. The integrated circuit of claim 1 wherein at least one of said first and second switches comprises a transistor.

10. The integrated circuit of claim 1 wherein:

said burn-in circuit includes N sections each generating a burn-in current, each section corresponding to an individual laser diode.

11. A system for performing burn-in comprising:

a current source operative to generate an input current;

a laser diode; and

an integrated circuit including:

a laser driver having an output for connection to said laser diode;

burn-in circuitry formed on said integrated circuit, said burn-in circuitry configured to receive the input current and generate therefrom a burn-in current;

a first switch formed on said integrated circuit, said first switch operative to couple said burn-in current directly to said laser diode in response to a first enable signal provided to said integrated circuit and further operative to directly decouple said burn-in circuit from the laser diode in response to a second enable signal provided to said integrated circuit; and

a second switch formed on said integrated circuit, said second switch operative to enable said burn-in circuit for generation of said burn-in current in response to said first enable signal, and further operative to disable said burn-in circuit for disabling generation of said burn-in current in response to said second enable signal.

12. The system of claim 11 further comprising an input buffer receiving a signal from a communications device.

13. The system of claim 12 further comprising a limiting amplifier for amplifying an output signal from said input buffer and providing an amplified signal to said laser driver.

14. The system of claim 11 wherein said burn-in circuitry includes an amplifier for amplifying a current from a current source to generate said burn-in current.

15. The system of claim 14 wherein said amplifier is a current mirror.

16. The system of claim 11 wherein said burn-in circuitry includes a current buffer for supplying a current from a current source to generate said burn-in current.

17. The system of claim 11 wherein at least one of said first and second switches comprises a transistor.

18. The system of claim 11 wherein:

said burn-in circuit includes N sections each generating a burn-in current, each section corresponding to an individual laser diode.

Assignments (12)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017206 FRAME: 0666. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038632/0662 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0672 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
Reel/Frame 017675/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 017206/0666 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2004
From: KIM, YOUNG GON; LEE, MYUNGHEE
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 015379/0413 →