IP Library Granted Patent US 7,279,869
Granted Patent B2
US 7,279,869 · App. 10/908,303 · Granted Oct 9, 2007

PFM control circuit for DC regulator

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Quick Facts
Patent No.
US 7,279,869
App. No.
10/908,303
Granted
Oct 9, 2007
Kind
B2
Abstract

A PFM control circuit generates a pulse control signal for controlling a switching regulator to convert an input voltage into an output voltage. The pulse control signal has a plurality of switch cycles, each of which consists of an ON-time and an OFF-time. The ON-time is applied to turn on a switching circuit of the switching regulator while the OFF-time is applied to turn off the switching circuit. A current detection signal is representative of a current flowing through an inductive device of the switching regulator. The ON-time is prolonged in accordance with an increase of a maximum of the current detection signal. A voltage detection signal is representative of the output voltage. The OFF-time is prolonged in accordance with a reduction of a falling rate of the voltage detection signal.

Claims (63)

1. A pulse frequency modulation control circuit for controlling a switching regulator having a switching circuit and an inductive device to convert an input voltage to an output voltage, the pulse frequency modulation control circuit comprising:

a current sensing circuit for generating a current detection signal representative of a current flowing through the inductive device;

a voltage sensing circuit for generating a voltage detection signal representative of the output voltage; and

a pulse generating circuit for generating a pulse control signal in response to the current detection signal and the voltage detection signal, the pulse control signal having a plurality of switch cycles, each of which consists of an ON-time applied to turn on the switching circuit and an OFF-time applied to turn off the switching circuit,

wherein:

the ON-time is adjusted in accordance with the current detection signal such that the ON-time is prolonged in response to an increase of a maximum of the current detection signal, and

the OFF-time is adjusted in accordance with the voltage detection signal such that the OFF-time is prolonged in response to a reduction of a falling rate of the voltage detection signal

wherein:

the pulse generating circuit comprises:

a reference ON-time setting circuit for preventing the ON-time from being shorter than a predetermined reference ON-time, and

an ON-time adjusting circuit for dynamically adjusting the ON-time in accordance with the current detection signal,

wherein:

the reference ON-time setting circuit comprises:

a current source;

a capacitor connected between the current source and a ground potential;

a switch controlled by the pulse control signal such that the switch is turned off during the ON-time for allowing the current source to charge the capacitor, and the switch is turned on during the OFF-time for allowing the capacitor to be discharged to the ground potential; and

a comparator for comparing a potential difference across the capacitor and a predetermined reference voltage.

2. The circuit according to claim 1 , wherein:

the ON-time during a present switch cycle is dynamically adjusted in accordance with the maximum of the current detection signal during a previous switch cycle.

3. The circuit according to claim 1 wherein:

the ON-time adjusting circuit comprises:

a sample-and-hold circuit for sampling and holding the maximum of the current detection signal, and

a variable current source controlled by the maximum of the current detection signal held on the sample-and-hold circuit for discharging the capacitor when the current source of the reference ON-time setting circuit charges the capacitor.

4. The circuit according to claim 3 , wherein:

the sample-and-hold circuit comprises:

a sampling capacitor;

a sampling transmission gate to be turned on during the ON-time for allowing the current detection signal to charge the sampling capacitor;

a holding capacitor; and

a holding transmission gate to be turned on during the OFF-time for allowing a potential difference across the sampling capacitor to be transferred to the holding capacitor.

5. The circuit according to claim 1 , wherein:

the pulse generating circuit further comprises:

a reference OFF-time setting circuit for preventing the OFF-time from being shorter than a predetermined reference OFF-time, and

an OFF-time adjusting circuit for dynamically adjusting the OFF-time in accordance with the voltage detection signal.

6. The circuit according to claim 5 , wherein:

the reference OFF-time setting circuit comprises:

a current source;

a capacitor connected between the current source and a ground potential;

a switch controlled by the pulse control signal such that the switch is turned on during the ON-time for allowing the capacitor to be discharged to the ground potential, and the switch is tumed off during the OFF-time for allowing the current source to charge the capacitor; and

a comparator for comparing a potential difference across the capacitor and a predetermined reference voltage.

7. The circuit according to claim 5 , wherein:

the OFF-time adjusting circuit is implemented by a comparator for comparing the voltage detection signal and a predetermined reference voltage so as to prevent the

OFF-time from being finished before the voltage detection signal falls below the reference voltage.

8. A pulse frequency modulation control circuit for controlling a switching regulator having a switching circuit and an inductive device to convert an input voltage to an output voltage, the pulse frequency modulation control circuit comprising:

a current sensing circuit for generating a current detection signal representative of a current flowing through the inductive device;

a voltage sensing circuit for generating a voltage detection signal representative of the output voltage; and

a pulse generating circuit for generating a pulse control signal in response to the current detection signal and the voltage detection signal, the pulse control signal having a plurality of switch cycles, each of which consists of an ON-time applied to turn on the switching circuit and an OFF-time applied to turn off the switching circuit,

wherein:

the ON-time is adjusted in accordance with the current detection signal such that the ON-time is longer in a heavy loading operation than in a light loading operation, and the OFF-time is adjusted in accordance with the voltage detection signal such that the OFF-time is longer in the light loading operation than in the heavy loading operations,

wherein:

the pulse generating circuit comprises:

a reference ON-time setting circuit for preventing the ON-time from being shorter than a predetermined reference ON-time, and

an ON-time adjusting circuit for dynamically adjusting the ON-time in accordance with the current detection signal,

wherein: the reference ON-time setting circuit comprises:

a current source;

a capacitor connected between the current source and a ground potential;

a switch controlled by the pulse control signal such that the switch is turned off during the ON-time for allowing the current source to charge the capacitor. and the switch is turned on during the OFF-time for allowing the capacitor to be discharged to the ground potential; and

a comparator for comparing a potential difference across the capacitor and a predetermined reference voltage.

9. The circuit according to claim 8 , wherein:

the ON-time during a present switch cycle is dynamically adjusted in accordance with a maximum of the current detection signal during a previous switch cycle.

10. The circuit according to claim 8 , wherein:

the ON-time adjusting circuit comprises:

a sample-and-hold circuit for sampling and holding a maximum of the current detection signal, and

a variable current source controlled by the maximum of the current detection signal held on the sample-and-hold circuit for discharging the capacitor when the current source of the reference ON-time setting circuit charges the capacitor.

Assignments (3)
MERGER Recorded Nov 20, 2008
From: AIMTRON TECHNOLOGY CORP.
To: GLOBAL MIXED-MODE TECHNOLOGY INC.
Reel/Frame 021861/0083 →
CHANGE OF THE ADDRESS OF THE ASSIGNEE Recorded Aug 31, 2007
From: AIMTRON TECHNOLOGY CORP.
To: AIMTRON TECHNOLOGY CORP.
Reel/Frame 019772/0121 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2005
From: TZENG, GUANG-NAN; CHEN, YUNG-CHIH; TAIN, YA-DER
To: AIMTRON TECHNOLOGY CORP.
Reel/Frame 015976/0112 →