IP Library Granted Patent US 7,253,757
Granted Patent B2
US 7,253,757 · App. 10/909,182 · Granted Aug 7, 2007

Sigma-delta modulator having a clocked delay line

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Quick Facts
Patent No.
US 7,253,757
App. No.
10/909,182
Granted
Aug 7, 2007
Kind
B2
Abstract

A sigma-delta modulator is provided with a filter for noise shaping, with the filter having at least one delay line (DL). The delay line (DL) is a clocked line.

Claims (31)

1. A sigma-delta modulator comprising

a plurality of components operating in a time continuous manner,

a filter for noise shaping, wherein the filter comprises a component operating in a time continuous manner and at least one clocked delay line, wherein the plurality of components and the filter form a cascaded converter and the delay line is a continuous-amplitude line.

2. The sigma-delta modulator according to claim 1 , wherein the modulator comprises a clocked comparator and is designed in such a manner that the delay line(s) is/are clocked at the comparator clock rate of the sigma-delta modulator.

3. The sigma-delta modulator according to claim 1 , wherein the modulator comprises a clocked comparator and is designed in such a manner that the delay line(s) is/are clocked at a clock rate which is higher than the comparator clock rate.

4. The sigma-delta modulator according to claim 1 , wherein the modulator has at least one operational amplifier which is operated in a time-continuous manner and is connected in series with the at least one delay line.

5. The sigma-delta modulator according to claim 4 , wherein the modulator has two delay lines and two operational amplifiers in a resonator loop.

6. The sigma-delta modulator according to claim 1 , wherein the delay line(s) is/are integrated by means of Bucket Brigade Devices (BBD) and/or Charge Coupled Devices (CCD).

7. A sigma-delta modulator comprising

a plurality of components operating in a time continuous manner,

a filter for noise shaping comprising at least one clocked delay line,

and a clocked comparator, wherein the delay line is a continuous-amplitude line and the comparator and the delay line are clocked with a common clock signal.

8. The sigma-delta modulator according to claim 7 , wherein the modulator has at least one operational amplifier which is operated in a time-continuous manner and is connected in series with the at least one delay line.

9. The sigma-delta modulator according to claim 8 , wherein the modulator has two delay lines and two operational amplifiers in a resonator loop.

10. The sigma-delta modulator according to claim 7 , wherein the modulator is in the form of a cascaded converter.

11. The sigma-delta modulator according to claim 7 , wherein the delay line(s) is/are integrated by means of Bucket Brigade Devices (BBD) and/or Charge Coupled Devices (CCD).

12. A sigma-delta modulator comprising:

a clocked comparator clocked by a first clock signal, and

a plurality of components operating in a time continuous manner,

a filter for noise shaping, wherein the filter comprises at least one delay line, and wherein the delay line is a clocked line clocked by a second clock signal which is higher than the first clock signal.

13. The sigma-delta modulator according to claim 12 , wherein the modulator has two delay lines and the plurality of components comprise two operational amplifiers.

14. The sigma-delta modulator according to claim 12 , wherein the modulator is in the form of a cascaded converter.

15. The sigma-delta modulator according to claim 12 , wherein the delay line(s) is/are integrated by means of Bucket Brigade Devices (BBD) and/or Charge Coupled Devices (CCD).

16. A sigma-delta modulator comprising

a plurality of components operating in a time continuous manner,

a filter for noise shaping, wherein the filter comprises a component operating in a time continuous manner and at least one clocked delay line, wherein the plurality of components and the filter form a cascaded converter,

wherein the modulator comprises a clocked comparator and is designed in such a manner that the delay line(s) is/are clocked at a clock rate which is higher than the comparator clock rate.

17. The sigma-delta modulator according to claim 16 , wherein the modulator has at least one operational amplifier which is operated in a time-continuous manner and is connected in series with the at least one delay line.

18. The sigma-delta modulator according to claim 17 , wherein the modulator has two delay lines and two operational amplifiers in a resonator loop.

19. The sigma-delta modulator according to claim 16 , wherein the delay line(s) is/are integrated by means of Bucket Brigade Devices (BBD) and/or Charge Coupled Devices (CCD).

20. The sigma-delta modulator according to claim 16 , wherein the delay line is a continuous-amplitude line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: WI-LAN INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041256/0735 →