IP Library Granted Patent US 7,214,596
Granted Patent B2
US 7,214,596 · App. 10/909,749 · Granted May 8, 2007

Method for the fabrication of isolation structures

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Quick Facts
Patent No.
US 7,214,596
App. No.
10/909,749
Filed
Aug 2, 2004
Granted
May 8, 2007
Kind
B2
Art Unit
2818
USPC
438/424
Abstract

A method for manufacturing insulating structures in a semiconductor substrate includes forming a first insulating layer on the semiconductor substrate, forming a stop layer on the first insulating layer, and forming a barrier layer on the stop layer. The barrier layer is selective with respect to the stop layer. A screen layer is formed on the barrier layer. A portion of the screen layer is selectively removed for forming an opening therethrough for exposing a portion of the barrier layer. The exposed barrier layer is removed for exposing a portion of the stop layer. The exposed stop layer is removed for exposing a portion of the semiconductor substrate. The method further includes removing the remaining barrier layer, and removing a portion of the exposed semiconductor substrate for forming a trench therein.

Claims (41)

1. A method for manufacturing insulating structures in a semiconductor substrate comprising;

forming a first insulating layer on the semiconductor substrate;

forming a stop layer on the first insulating layer;

forming a barrier layer on the stop layer, the barrier layer being selectively removable with respect to the stop layer;

forming a screen layer on the barrier layer;

selectively removing a portion of the screen layer for forming an opening therethrough for exposing a portion of the barrier layer;

removing the exposed barrier layer for exposing a portion of the stop layer;

removing the exposed stop layer for exposing a portion of the semiconductor substrate;

removing the remaining barrier layer and, at a same time, removing a portion of the exposed semiconductor substrate for forming a trench therein.

2. A method according to claim 1 , further comprising removing the remaining screen layer when the exposed stop layer is removed.

3. A method according to claim 1 , further comprising forming a second insulating layer on the stop layer before forming the barrier layer.

4. A method according to claim 1 , wherein removing the remaining barrier layer is performed by plasma etching.

5. A method according to claim 4 , wherein the plasma etching is performed with a low polymerizing chemistry.

6. A method according claim 1 , wherein the screen layer comprises a resist layer.

7. A method according to claim 1 , wherein removing the exposed barrier layer is performed by a non-fluorine-based chemistry etching.

8. A method according to claim 1 , wherein the barrier layer comprises a semiconductor layer.

9. A method according to claim 8 , wherein the semiconductor layer comprises a polysilicon layer.

10. A method according to claim 1 , wherein the stop layer comprises a nitride layer.

11. A method according to claim 1 , further comprising forming a supplementary layer on the barrier layer before forming the screen layer.

12. A method for manufacturing insulating structures in a semiconductor substrate comprising:

forming a first insulating layer on the semiconductor substrate;

forming a stop layer on the first insulating layer;

forming a barrier layer on the stop layer, the barrier layer being selectively removable with respect to the stop layer;

forming a screen layer on the barrier layer;

selectively removing a portion of the screen layer for forming an opening therethrough for exposing a portion of the barrier layer;

removing the exposed barrier layer for exposing a portion of the stop layer;

removing the exposed stop layer for exposing a portion of the semiconductor substrate;

removing the remaining barrier layer; removing a portion of the exposed semiconductor substrate for forming a trench therein; and

forming a second insulating layer on the stop layer before forming the barrier layer.

13. A method according to claim 12 , wherein the barrier layer comprises a semiconductor layer.

14. A method for manufacturing insulating structures in a semiconductor substrate comprising:

forming a first insulating layer on the semiconductor substrate;

forming a stop layer on the first insulating layer;

forming a barrier layer on the stop layer, the barrier layer comprising a semiconductor layer and being selectively removable with respect to the stop layer;

forming a screen layer on the barrier layer;

selectively removing a portion of the screen layer for forming an opening therethrough for exposing a portion of the barrier layer;

removing the exposed barrier layer for exposing a portion of the stop layer;

removing the exposed stop layer for exposing a portion of the semiconductor substrate;

removing the remaining barrier layer; and

removing a portion of the exposed semiconductor substrate for forming a trench therein.

15. A method according to claim 14 , wherein the semiconductor layer comprises a polysilicon layer.