Semiconductor device
View Patent ↗The present invention provides a miniaturized semiconductor device at low-cost having high integration density and for restraining an increase of an insertion loss and a deterioration of an isolation characteristic of a circuit resulting from parasitic inductance of gold wires. The semiconductor device includes a control semiconductor chip, a switch circuit semiconductor chip, a substrate, external terminals, gold wires and MIM capacitors. The control semiconductor chip controls a high frequency signal processing by the switch circuit semiconductor chip 111 . The switch circuit semiconductor chip is mounted on the control semiconductor chip and processes the high frequency signal. The control semiconductor chip is mounted on the substrate. The external terminals are interfaces with the outside. The gold wires connect among the control semiconductor chip, the switch circuit semiconductor chip and the external terminals. The MIM capacitors are formed on the control semiconductor chip and the inside of the substrate, and process the high frequency signal.
1. A semiconductor device comprising:
a first semiconductor chip for processing a high frequency signal, said first semiconductor chip including:
a first terminal and a second terminal for inputting and outputting the high frequency signal;
a first switch on a signal path between said first terminal and said second terminal; and
a second switch connected to a signal path between said first switch and said first terminal; and
a second semiconductor chip for controlling the high frequency signal processing performed by said first semiconductor chip, said first semiconductor chip and said second semiconductor chip being respectively made of different materials, said second semiconductor chip including:
a ground terminal connected to said second switch;
a capacitor on a signal path between said ground terminal and said second switch; and
a circuit which controls ON and OFF of said first switch and said second switch.
2. The semiconductor device of claim 1 , wherein said first semiconductor chip is made of GaAs, and said second semiconductor chip is made of Si.
3. The semiconductor device of claim 2 , further comprising a substrate on which said first semiconductor chip and said second semiconductor chip are located, wherein said substrate includes external terminals to which said first terminal, said second terminal, and said ground terminal are connected via respective wires.
4. The semiconductor device of claim 3 , wherein said external terminals are arranged at a periphery of said substrate, said first terminal and said second terminal are arranged at a periphery of said first semiconductor chip, and said ground terminal is arranged at a periphery of said second semiconductor chip.
5. The semiconductor device of claim 4 , wherein said substrate includes a capacitor connected to one of said external terminals.
6. The semiconductor device of claim 5 , wherein said first semiconductor chip is located on said second semiconductor chip.
7. The semiconductor device of claim 1 , further comprising a substrate on which said first semiconductor chip and said second semiconductor chip are located, wherein said substrate includes external terminals to which said first terminal, said second terminal, and said ground terminal are connected via respective wires.
8. The semiconductor device of claim 7 , wherein said external terminals are arranged at a periphery of said substrate, said first terminal and said second terminal are arranged at a periphery of said first semiconductor chip, and said ground terminal is arranged at a periphery of said second semiconductor chip.
9. The semiconductor device of claim 7 , wherein said substrate further includes a capacitor connected to one of said external terminals.
10. The semiconductor device of claim 1 , wherein said first semiconductor chip is located on said second semiconductor chip.