IP Library Granted Patent US 6,952,133
Granted Patent B2
US 6,952,133 · App. 10/911,227 · Granted Oct 4, 2005

Low-distortion differential circuit

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Quick Facts
Patent No.
US 6,952,133
App. No.
10/911,227
Granted
Oct 4, 2005
Kind
B2
Abstract

A differential feedback system that minimizes even order distortion of a differential circuit. The feedback system includes a feedback circuit for use with a differential circuit to reduce even-order distortion and dc offset of a difference output signal produced by the differential circuit. The feedback circuit includes an integrator coupled to receive the difference output signal from the differential circuit and produce an integrator output signal. The feedback circuit also includes a control circuit coupled to the integrator to receive the integrator output signal to produce a control signal that is coupled to the differential circuit, wherein the control signal controls the differential circuit to reduce the even-order distortion and the DC offset.

Claims (19)

1. A feedback circuit for use with a differential circuit to reduce even-order distortion and dc offset of a difference output signal produced by the differential circuit, the feedback circuit comprising:

means for integrating that is coupled to receive the difference output signal and produce an integration output signal; and

means for controlling that is coupled to the means for integrating to receive the integration output signal and produce a control signal that is coupled to the differential circuit, wherein the control signal controls the differential circuit to reduce the even-order distortion and the DC offset.

2. The feedback circuit of claim 1 , wherein the means for controlling comprises an first current circuit that receives the integration output signal and produces a first current signal that is part of the control signal, the first current signal is coupled to the difference output signal of the differential circuit.

3. The feedback circuit of claim 2 , wherein the means for controlling comprises an second current circuit that receives the integration output signal and produces a second current signal that is part of the control signal, the second current signal is coupled to a differential input of the differential circuit.

4. The feedback circuit of claim 3 , further comprising means for providing a replica amplifier that is coupled between the means for controlling and the differential circuit.

5. The feedback circuit of claim 4 , wherein the means for controlling comprises an third current circuit that receives the integration output signal and produces a third current signal that is part of the control signal, the third current signal is coupled to the means for providing a replica amplifier.

6. The feedback circuit of claim 5 , further comprising means for selectively coupling the means for providing a replica amplifier to the integration output signal.

7. A feedback circuit for use with a differential circuit to reduce even-order distortion and dc offset of a difference output signal produced by the differential circuit, the feedback circuit comprising:

means for providing a replica amplifier that is coupled to the differential circuit; and

means for controlling that is coupled to the means for providing a replica amplifier; the means for controlling operates to produce a control signal that is coupled to the means for providing a replica amplifier to reduce the even-order distortion and the DC offset.

8. The feedback circuit of claim 7 , wherein the means for providing a replica amplifier comprises:

a first transistor pair coupled to a differential input of the differential circuit; and

a second transistor pair coupled to the difference output signal of the differential circuit.

9. The feedback circuit of claim 7 , further comprising means for integrating coupled to receive the difference output signal and produce an integration signal that is coupled to the control circuit.

10. The feedback circuit of claim 7 , wherein the means for controlling comprises:

a first current generation circuit coupled to the differential input of the differential circuit;

a second current generation circuit coupled to the difference output signal; and

a third current generation circuit coupled to replica amplifier.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2015
From: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
To: NXP B.V.
Reel/Frame 034854/0262 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2015
From: NXP B.V.
To: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
Reel/Frame 034752/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2015
From: NXP B.V.
To: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
Reel/Frame 034747/0893 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2014
From: QUINTIC HOLDINGS
To: QUINTIC MICROELECTRONICS (WUXI) CO., LTD.
Reel/Frame 034037/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2009
From: SEQUOIA COMMUNICATIONS CORPORATION
To: QUINTIC HOLDINGS
Reel/Frame 023639/0014 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2005
From: GROE, JOHN
To: SEQUOIA COMMUNICATIONS CORP.
Reel/Frame 016908/0645 →