IP Library Patent Application 10911369
Patent Application
App. No. 10/911,369

Logarithmic amplifier with base and emitter in feedback path

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Quick Facts
Patent No.
US None
App. No.
10/911,369
Abstract

A logarithmic amplifier includes the base and emitter of a bipolar junction transistor coupled in a feedback path between the output and the input of a gain element. When the bipolar junction transistor is a PNP transistor, the logarithmic amplifier can be made compatible with CMOS semiconductor circuitry and processes.

Claims (15)

1 . An amplifier, comprising:

a gain element; and

a bipolar junction transistor having an emitter coupled to an output of the gain element and having a base coupled to an input of the gain element.

2 . The amplifier of claim 1 wherein the gain element is a voltage amplifier and the base of the bipolar junction transistor is coupled to an inverting input of the voltage amplifier, and wherein the base receives an applied current and the gain element provides an output voltage in response to the applied current.

3 . The amplifier of claim 1 wherein the bipolar junction transistor is a PNP transistor.

4 . The amplifier of claim 2 wherein the bipolar junction transistor is a PNP transistor.

5 . The amplifier of claim 3 wherein the gain element and the bipolar junction transistor are integrated into a CMOS integrated circuit.

6 . The amplifier of claim 4 wherein the gain element and the bipolar junction transistor are integrated into a CMOS integrated circuit.

7 . The amplifier of claim 1 wherein the bipolar junction transistor is an NPN transistor.

8 . The amplifier of claim 2 wherein the bipolar junction transistor is an NPN transistor.

9 . The amplifier of claim 2 further comprising a reference logarithmic amplifier including a reference bipolar junction transistor having parameters matched to the bipolar junction transistor, the reference logarithmic amplifier providing a reference current and providing a reference output, wherein the difference between the output of the gain element and the reference output is proportional to the logarithm of the ratio of the applied current to the reference current.

10 . The amplifier of claim 9 wherein the bipolar junction transistor is a PNP transistor and the reference bipolar junction transistor is a PNP transistor.

11 . The amplifier of claim 9 wherein the gain element and the bipolar junction transistor and the reference logarithmic amplifier are integrated into a CMOS integrated circuit.

12 . The amplifier of claim 10 wherein the gain element and the bipolar junction transistor and the reference logarithmic amplifier are integrated into a CMOS integrated circuit.

13 . The amplifier of claim 9 wherein the bipolar junction transistor is an NPN transistor and the reference bipolar junction transistor is an NPN transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2007
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 019084/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2004
From: BAUMGARTNER, RICHARD A
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 015270/0715 →