Protection circuit for semiconductor device and semiconductor device including the same

1. A protection circuit, comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line; and

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison,

wherein the reference value is the time measured by the counter during a period when the shielded line is in a normal state.

2. A protection circuit, comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line; and

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison,

wherein the counter performs the measurement of the time by counting a clock pulse output from an oscillator provided in the area to be protected over the semiconductor device.

3. A protection circuit, comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line; and

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison, wherein;

the protection circuit includes a plurality of said shielded lines;

the signal generator applies a signal to a start point of one of the plurality of shielded lines; and

the protection circuit further includes a switching circuit for notifying the counter about arrival of the signal at the end point of the shielded line to which the signal has been applied.

4. A protection circuit, comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line;

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison; and

a signal line in the area to be protected over the semiconductor device, wherein;

the signal generator applies a signal to the start point of the shielded line and an end of the signal line; and

the protection circuit further includes a determination circuit for comparing the signal arriving at the end point of the shielded line and the signal arriving at the other end of the signal line to output a fraud detection signal according to a result of the comparison.

5. The protection circuit of claim 4 , wherein the signal generator includes a random number generator.

6. A protection circuit, comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line;

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison; and

a failure diagnosis section for applying to the comparator a test signal in substitution for the time measured by the counter and comparing a signal output from the comparator according to the applied test signal with an expected value to output a failure detection signal according to a result of the comparison.

7. A semiconductor device including a protection circuit, said protection circuit comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line; and

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison,

wherein the semiconductor device shifts in response to the fraud detection signal to a mode in which fraudulent analysis and tampering of information are disabled.

8. A semiconductor device including a protection circuit, said protection circuit comprising:

at least one shielded line arranged to cover an area to be protected over a semiconductor device, the at least one shielded line having only one route from a start point to an end point;

a signal generator for applying a signal to the start point of the shielded line;

a counter which starts measurement of time in response to application of the signal to the start point of the shielded line by the signal generator and which ends measurement of the time in response to arrival of the signal at the end point of the shielded line; and

a comparator for comparing the time measured by the counter with a reference value to output a fraud detection signal according to a result of the comparison, wherein:

the semiconductor device shifts according to the fraud detection signal to a reset mode or fixed mode which is canceled when a power supply is interrupted; and

if the fraud detection signal is output a predetermined number of times in series, the semiconductor device shifts to a mode in which fraudulent analysis and tampering of information are disabled.