IP Library Granted Patent US 6,972,969
Granted Patent B1
US 6,972,969 · App. 10/922,661 · Granted Dec 6, 2005

System and method for controlling current limit with primary side sensing

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,972,969
App. No.
10/922,661
Granted
Dec 6, 2005
Kind
B1
Abstract

A primary side sensing power control system and method that controls the current limit such that it is maintained within a small range for any acceptable input voltages and causes the output voltage of a PWM controller to drop as the output load increases when the current limit is reached.

Claims (34)

1. A method for limiting an output current of a power supply having a primary and secondary side using pulse width modulation comprising the steps of:

generating a sense voltage signal on the primary side that is proportional to an output voltage signal on the secondary side;

generating a digital feedback voltage signal from a sense voltage signal;

generating an error feedback signal that is a function of a difference between said digital feedback voltage signal and a nominal feedback voltage signal,

generating a control signal wherein said control signal corresponds to said error feedback signal when an output current does not exceed an output current limit, and wherein said control signal corresponds to said digital feedback voltage that is offset by a first voltage when said output current exceeds the output current limit;

generating a squared feed-forward signal that is proportional to the square of a direct current input voltage signal; and

generating an on-time signal for pulse width modulation based upon said control signal and said squared feed-forward signal.

2. The method of claim 1 , further comprising the step of:

modifying at least one of said on-time and a switching period to maintain a substantially constant current limit for any acceptable input voltage.

3. The method of claim 2 , wherein a ratio of a square of said on-time to said switching period is maintained as substantially constant for any acceptable input voltage.

4. The method of claim 1 , wherein said on-time signal controls the on-time of a switch wherein said on-time is reduced and said output voltage is reduced when said output current exceeds said output current limit.

5. A system for limiting an output current of a power supply having a primary and secondary side using pulse width modulation comprising:

generating means for generating a sense voltage signal on the primary side that is proportional to an output voltage on the secondary side;

feedback means for generating a digital feedback voltage signal from a sense voltage signal;

error means for generating an error feedback signal that is a function of a difference between said digital feedback voltage signal and a nominal feedback voltage signal,

control means for generating a control signal wherein said control signal corresponds to said error feedback signal when an output current does not exceed an output current limit, and wherein said control signal corresponds to said digital feedback voltage that is offset by a first voltage when said output current exceeds the output current limit;

squared feed-forward means for generating a squared feed-forward signal that is proportional to the square of a direct current input voltage signal; and

pulse generation means for generating an on-time signal for pulse width modulation based upon said control signal and said squared feed-forward signal.

6. The system of claim 5 , wherein said pulse generation means modifies at least one of said on-time and a switching period to maintain a substantially constant current limit for any acceptable input voltage.

7. The system of claim 6 , wherein a ratio of a square of said on-time to said switching period is maintained as substantially constant for any acceptable input voltage.

8. The system of claim 5 , wherein said on-time signal controls the on-time of a switch wherein said on-time is reduced and said output voltage is reduced when said output current exceeds said output current limit.

9. A pulse width modulation controller for controlling a current limit within a small range in a power supply having a primary side and a secondary side, comprising:

a sense voltage unit for generating a sense voltage on the primary side that is proportional to an output voltage on the secondary side;

a converter for generating a digital feedback voltage signal from a sense voltage signal;

an error amplifier, for generating an error feedback signal that is a function of a difference between said digital feedback voltage signal and a nominal feedback voltage signal,

a control signal generator for generating a control signal wherein said control signal corresponds to said error feedback signal when an output current does not exceed an output current limit, and wherein said control signal corresponds to said digital feedback voltage that is offset by a first voltage when said output current exceeds the output current limit;

a squared feed-forward unit, that receives a direct current input voltage signal and generates a squared feed-forward signal that is proportional to the square of said direct current input voltage signal;

a pulse generator for receiving said control signal and said squared feed-forward signal and generates an on-time signal for pulse width modulation based upon said control signal and said squared feed-forward signal.

10. The controller of claim 9 , further comprising:

a filter for filtering an input voltage signal to generate said direct current input voltage signal.

11. The controller of claim 10 wherein said filter is a high pass filter.

12. The controller of claim 9 , wherein said pulse generator modifies at least one of said on-time and a switching period to maintain a substantially constant current limit for any acceptable input voltage.

13. The controller of claim 12 , wherein a ratio of a square of said on-time to said switching period is maintained as substantially constant for any acceptable input voltage.

14. The controller of claim 9 , wherein said on-time signal controls the on-time of a switch wherein said on-time is reduced and said output voltage is reduced when said output current exceeds said output current limit.

Assignments (9)
CHANGE OF NAME Recorded Mar 11, 2014
From: DIALOG SEMICONDUCTOR, INC.
To: DIALOG SEMICONDUCTOR INC.
Reel/Frame 032427/0733 →
CHANGE OF NAME Recorded Mar 5, 2014
From: IWATT INC.
To: DIALOG SEMICONDUCTOR, INC.
Reel/Frame 032391/0234 →
RELEASE OF SECURITY INTEREST Recorded Jun 6, 2013
From: SILICON VALLEY BANK
To: IWATT INC.
Reel/Frame 030571/0636 →
MERGER Recorded Mar 29, 2013
From: IWATT INC.
To: IWATT INC.
Reel/Frame 030112/0599 →
SECURITY AGREEMENT Recorded Oct 6, 2009
From: IWATT INC.
To: SILICON VALLEY BANK
Reel/Frame 023330/0187 →
RELEASE OF SECURITY INTEREST Recorded Jul 15, 2008
From: HERCULES TECHNOLOGY GROWTH CAPITAL, INC
To: IWATT, INC.
Reel/Frame 021230/0575 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE TO SECURITY AGREEMENT PREVIOUSLY RECORDED ON REEL 020035 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE THE NATURE OF CONVEYANCE WAS ASSIGNMENT. Recorded Feb 12, 2008
From: IWATT, INC.
To: HERCULES TECHNOLOGY GROWTH CAPILAT, INC
Reel/Frame 020487/0827 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2007
From: IWATT, INC..
To: HERCULES TECHNOLOGY GROWTH CAPITAL, INC.
Reel/Frame 020035/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2005
From: SHTEYNBERG, ANATOLY; ZHENG, JUNJIE; RODRIGUEZ, HARRY; TELEFUS, MARK; ZHOU, DONGSHENG
To: IWATT INC.
Reel/Frame 016239/0214 →