IP Library Granted Patent US 7,113,234
Granted Patent B2
US 7,113,234 · App. 10/923,627 · Granted Sep 26, 2006

Liquid crystal display without storage capacitance electrode lines

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Quick Facts
Patent No.
US 7,113,234
App. No.
10/923,627
Granted
Sep 26, 2006
Kind
B2
Abstract

A liquid crystal display without storage capacitance electrode lines. At least one storage capacitor structure including first and second metal layers and a dielectric layer disposed therebetween is formed on a lower substrate. The first and second metal layers are discrete. The second metal layer is electrically connected to the pixel electrode and is located above the first metal layer. The second metal layer overlaps a portion of the first metal layer. An insulating spacer is formed on the interior of an upper substrate and extended into a liquid crystal layer to maintain a cell gap. A common electrode is conformally formed on the upper substrate and the insulating spacer to electrically connect the first metal layer via a discrete transparent conductive layer.

Claims (33)

1. A liquid crystal display comprising a plurality of pixel areas, each comprising:

a first substrate and a second substrate disposed opposite thereto with a liquid crystal layer interposed therebetween;

at least one storage capacitor structure formed on the first substrate, wherein the storage capacitor structure comprises a first conductive layer, a second conductive layer and a dielectric layer interposed therebetween, the first and second conductive layers are discrete and the second conductive layer is located above the first conductive layer and overlaps a portion of the first conductive layer;

an insulating layer over the first substrate and the storage capacitor structure; and

a first transparent conductive layer formed on part of the insulating layer;

a second transparent conductive layer formed on part of the insulating layer, wherein the second transparent conductive layer serving as a pixel electrode is separated from the first transparent conductive layer;

an insulating spacer formed on a portion of an interior of the second substrate and extended into the liquid crystal layer to maintain a cell gap; and

a third transparent conductive layer serving as a common electrode conformally formed on the interior of the second substrate and a surface of the insulating spacer to electrically connect the first conductive layer or the second conductive layer.

2. The liquid crystal display according to claim 1 , wherein

the third transparent conductive layer is electrically connected to the first conductive layer through the first transparent conductive layer and the second transparent conductive layer is electrically connected to the second conductive layer.

3. The liquid crystal display according to claim 1 , wherein

the third transparent conductive layer is electrically connected to the second conductive layer through the first transparent conductive layer and the second transparent conductive layer is electrically connected to the first conductive layer.

4. The liquid crystal display according to claim 1 , wherein the first substrate is a glass substrate comprising a thin film transistor.

5. The liquid crystal display according to claim 4 , wherein a gate of the thin film transistor and the first conductive layer are formed simultaneously.

6. The liquid crystal display according to claim 5 , wherein a source and a drain of the thin film transistor and the second conductive layer are formed simultaneously.

7. The liquid crystal display according to claim 1 , wherein the insulating layer comprises a passivation layer and an organic planarization layer.

8. The liquid crystal display according to claim 1 , wherein the second substrate is a glass substrate comprising a color filter.

9. The liquid crystal display according to claim 8 , wherein the color filter comprises a light shielding film corresponding to the insulating spacer.

10. The liquid crystal display according to claim 1 , wherein the first and second conductive layers correspond to at least one region near a periphery of the pixel area.

11. A method of forming a liquid crystal display, comprising the steps of:

forming a transversely extending gate line and a discrete first metal layer on a first substrate, wherein the gate line comprises a gate;

forming a dielectric layer to cover the gate line, the first metal layer and the first substrate;

forming a semiconductor layer on the dielectric layer above the gate;

simultaneously forming a longitudinally extending source line on the dielectric layer, a drain on part of the semiconductor layer and a discrete second metal layer on the dielectric layer, wherein the source line comprises a source extended onto part of the semiconductor layer, the second metal layer overlaps part of the first metal layer and the first and second metal layers and the dielectric layer located therebetween comprises a storage capacitor structure;

blanketly forming an insulating layer to cover the first substrate;

forming a first transparent conductive layer on part of the insulating layer;

forming a second transparent conductive layer on part of the insulating layer, wherein the second transparent conductive layer serving as a pixel electrode is separated from the first transparent conductive layer;

providing a second substrate opposite the first substrate;

interposing a liquid crystal layer between the first substrate and the second substrate;

forming an insulating spacer on a portion of an interior of the second substrate, wherein the insulating spacer is extended into the liquid crystal layer to maintain a cell gap; and

forming a conformal third transparent conductive layer serving as a common electrode on the interior of the second substrate and a surface of the insulating spacer to electrically connect the first metal layer or the second metal layer.

12. The method according to claim 11 , wherein the third transparent conductive layer is electrically connected to the first metal layer through the first transparent conductive layer and the second transparent conductive layer is electrically connected to the second metal layer.

13. The method according to claim 11 , wherein third transparent conductive layer is electrically connected to the second metal layer through the first transparent conductive layer and the second transparent conductive layer is electrically connected to the first metal layer.

Assignments (2)
APPROVAL OF MERGER APPLICATION Recorded Jan 16, 2007
From: QUANTA DISPLAY, INC.
To: AU OPTRONICS CORPORATION
Reel/Frame 018757/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2004
From: CHANG, YUNG-CHI
To: QUANTA DISPLAY INC.
Reel/Frame 015720/0912 →