IP Library Granted Patent US 7,176,124
Granted Patent B2
US 7,176,124 · App. 10/923,827 · Granted Feb 13, 2007

Method for fabricating electronic device

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Quick Facts
Patent No.
US 7,176,124
App. No.
10/923,827
Granted
Feb 13, 2007
Kind
B2
Abstract

A method for fabricating an electronic device includes: a step of forming a first conductor to become a wiring or a wiring plug in a first insulating film; a step of forming a second insulating film on the first insulating film and the first conductor and, after that, forming a hole reaching the top face of the first conductor in the second insulating film; a step of forming a first barrier metal film on a bottom and side walls of the hole and on the second insulating film; a step of removing a portion formed on the bottom of the hole in the first barrier metal film to thereby expose the top face of the first conductor; a step of performing a plasma process using a reducing gas after the step of exposing the top face of the first conductor; and a step of forming a second conductor to become a wiring plug or a wiring by filling a conductive film in the hole after the step of performing the plasma process.

Claims (24)

1. A method for fabricating an electronic device, comprising:

a step of forming a first conductor to become a wiring or a wiring plug in a first insulating film;

a step of forming a second insulating film on said first insulating film and said first conductor and, after that, forming a hole reaching the top face of said first conductor in said second insulating film;

a step of forming a first barrier metal film on a bottom and side walls of said hole and on said second insulating film;

a step of removing a portion formed on the bottom of said hole in said first barrier metal film to thereby expose the top face of said first conductor;

a step of performing a plasma process using a reducing gas after the step of exposing the top face of said first conductor; and

a step of forming a second conductor to become a wiring plug or a wiring by filling a conductive film in said hole after the step of performing said plasma process.

2. The method for fabricating an electronic device according to claim 1 , further comprising a step of forming a second barrier metal film on said first barrier metal film and said first conductor exposed in said hole, between the step of performing said plasma process and the step of forming said second conductor.

3. The method for fabricating an electronic device according to claim 1 , further comprising a step of performing an annealing process using a reducing gas between the step of forming said hole and the step of forming said first barrier metal film.

4. The method for fabricating an electronic device according to claim 1 , wherein the step of exposing the top face of said first conductor includes at least a step of removing said first barrier metal film in said hole on said first conductor.

5. The method for fabricating an electronic device according to claim 1 , wherein the step of exposing the top face of said first conductor includes a step of making said first barrier metal film formed on the side walls of said hole and on the outside of said hole remain.

6. The method for fabricating an electronic device according to claim 1 , wherein said second insulating film is a low dielectric constant film.

7. A method for fabricating an electronic device, comprising:

a step of forming a first conductor to become a wiring or a wiring plug in a first insulating film;

a step of forming a second insulating film on said first insulating film and said first conductor and, after that, forming a hole reaching the top face of said first conductor in said second insulating film;

a step of forming a first barrier metal film on a bottom and side walls of said hole and on said second insulating film;

a step of removing a portion formed on the bottom of said hole in said first barrier metal film to thereby expose the top face of said first conductor;

a step of performing an annealing process using a reducing gas after the step of exposing the top face of said first conductor; and

a step of forming a second conductor to become a wiring plug or a wiring by filling a conductive film in said hole after the step of performing said annealing process.

8. The method for fabricating an electronic device according to claim 7 , further comprising a step of forming a second barrier metal film on said first barrier metal film and said first conductor exposed in said hole, between the step of performing said annealing process and the step of forming said second conductor.

9. The method for fabricating an electronic device according to claim 7 , further comprising a step of performing an annealing process using a reducing gas between the step of forming said hole and the step of forming said first barrier metal film.

10. The method for fabricating an electronic device according to claim 7 , wherein the step of exposing the top face of said first conductor includes at least a step of removing said first barrier metal film in said hole on said first conductor.

11. The method for fabricating an electronic device according to claim 7 , wherein the step of exposing the top face of said first conductor includes a step of making said first barrier metal film formed on the side walls of said hole and on the outside of said hole remain.

12. The method for fabricating an electronic device according to claim 7 , wherein said second insulating film is a low dielectric constant film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Sep 19, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 033777/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2004
From: MATSUMOTO, SUSUMU
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 015734/0066 →