Low power quadrature voltage controlled oscillator using back gate
View Patent ↗Disclosed is a quadrature VCO (voltage controlled oscillator) which comprises a first delay cell including a first switching transistor and a second switching transistor, the first delay cell outputting first and second in-phase signals with different phases; and a second delay cell including a third switching transistor and a fourth switching transistor, the second delay cell outputting first and second quadrature-phase signals with different phases. The first and second quadrature-phase signals are applied to back gates of the first and second switching transistors, and the first and second in-phase signals are applied to back gates of the fourth and third switching transistors.
1. A quadrature VCO (voltage controlled oscillator) comprising a first delay cell for outputting a first in-phase signal and a second in-phase signal with a different phase from the first in-phase signal, and a second delay cell for outputting a first quadrature-phase signal and a second quadrature-phase signal with a different phase from the first quadrature-phase signal,
wherein the first delay cell comprises:
a first transistor including a gate, a source, a drain for outputting the first in-phase signal, and a back gate for receiving the first quadrature-phase signal;
a second transistor including a gate, a source, a drain for outputting the second in-phase signal, and a back gate for receiving the second quadrature-phase signal, the second transistor being cross-coupled to the first transistor;
a first LC resonance circuit coupled between the drains of the first transistor and the second transistor and a first power source;
a first current source coupled between a node of the sources of the first transistor and the second transistor and a second power source;
a first capacitor connected to the back gate of the first transistor and receiving the first quadrature-phase signal; and
a second capacitor connected to the back gate of the second transistor and receiving the second quadrature-phase signal, and
the second delay cell comprises:
a third transistor including a gate, a source, a drain for outputting the first quadrature-phase signal, and a back gate for receiving the second in-phase signal;
a fourth transistor including a gate, a source, a drain for outputting the second quadrature-phase signal, and a back gate for receiving the first in-phase signal, the fourth transistor being cross-coupled to the third transistor;
a second LC resonance circuit coupled between the drains of the third transistor and the fourth transistor and the first power source;
a second current source coupled between a node of the sources of the third transistor and the fourth transistor and the second power source;
a third capacitor connected to the back gate of the third transistor and receiving the second in-phase signal; and
a fourth capacitor connected to the back gate of the fourth transistor and receiving the first in-phase signal.
2. The quadrature VCO of claim 1 , further comprising resistors respectively coupled between the back gates and the sources of the first to fourth transistors.
3. The quadrature VCO of claim 1 , wherein the first LC resonance circuit comprises:
first and second inductors respectively coupled between the drains of the first and second transistors and the first power source; and
first and second varactors each having one terminal respectively coupled to the drains of the first and second transistors, and other grounded terminals, a control voltage for controlling frequencies of the first and second in-phase signals being applied to a node of the other terminals, and
the second LC resonance circuit comprises:
third and fourth inductors respectively coupled between the drains of the third and fourth transistors and the first power source; and
third and fourth varactors each having one terminal respectively coupled to the drains of the third and fourth transistors, and other grounded terminals, a control voltage for controlling frequencies of the first and second quadrature-phase signals being applied to a node of the other terminals.
4. A quadrature VCO (voltage controlled oscillator) comprising a first delay cell for outputting a first in-phase signal and a second in-phase signal with a different phase from the first in-phase signal, and a second delay cell for outputting a first quadrature-phase signal and a second quadrature-phase signal with a different phase from the first quadrature-phase signal,
wherein the first delay cell comprises:
a first negative resistance cell for generating negative resistance;
a second negative resistance cell comprising a first transistor including a gate, a source coupled to a first power source, a drain for outputting the first in-phase signal, and a back gate for receiving the first quadrature-phase signal, and a second transistor including a gate, a source, a drain for outputting the second in-phase signal, and a back gate for receiving the second quadrature-phase signal, the second transistor being cross-coupled to the first transistor;
a first LC resonance circuit coupled between the first and second negative resistance cells; and
a first current source coupled between the first negative resistance cell and a second power source;
a first capacitor connected to the back gate of the first transistor and receiving the first quadrature-phase signal; and
a second capacitor connected to the back gate of the second transistor and receiving the second quadrature-phase signal, and
the second delay cell comprises:
a third negative resistance cell for generating negative resistance;
a fourth negative resistance cell comprising a third transistor including a gate, a source coupled to the first power source, a drain for outputting the first quadrature-phase signal, and a back gate for receiving the second in-phase signal, and a fourth transistor including a gate, a source, a drain for outputting the second quadrature-phase signal, and a back gate for receiving the first in-phase signal;
a second LC resonance circuit coupled between the third and fourth negative resistance cells;
a second current source coupled between the third negative resistance cell and the second power source;
a third capacitor connected to the back gate of the third transistor and receiving the second in-phase signal; and
a fourth capacitor connected to the back gate of the fourth transistor and receiving the first in-phase signal.
5. The quadrature VCO of claim 4 , further comprising resistors respectively coupled between the back gates and the sources of the first to fourth transistors.
6. A quadrature VCO (voltage controlled oscillator) comprising:
a first delay cell including a first transistor and a second transistor, the first delay cell outputting a first in-phase signal and a second in-phase signal with a different phase from the first in-phase signal; and
a second delay cell including a third transistor and a fourth transistor, the second delay cell outputting a first quadrature-phase signal and a second quadrature-phase signal with a different phase from the first quadrature-phase signal, and
wherein the first in-phase signal is applied to a first capacitor connected to a back gate of the fourth transistor, the second in-phase signal is applied to a second capacitor connected to a back gate of the third transistor, the first quadrature-phase signal is applied to a third capacitor connected to a back gate of the first transistor, and the second quadrature-phase signal is applied to a fourth capacitor connected to a back gate the second transistor.